88EM8040 Datasheet, PDF (32/48 Pages) –

88EM8040/88EM8041
Datasheet
ω_p should be placed above the double line frequency. The magnitude of the gain around the double
line frequency should below the unity gain, which is 0db axis in the bode plot, in order to attenuate
the double line frequency ripple.
The following is a design example of this network: R_S4=15.4kΩ, R_S5=2kΩ, C_S1=4.7μF and
C_S2=47nF. This produces a zero and pole as: ω_z = 16.94Hz, ω_p = 1.71kHz. The bode plot is shown in
Figure 21. The magnitude of the gain at 100Hz to 120Hz is about -18dB, therefore the double line
frequency ripple is attenuated. The parameters are designed to maintain the stability for the single
stage PFC system.
Figure 21: Bode Plot of Compensation Network at Secondary Side
100
50
0
-50
10^-4
10^-2
10⁰
10²
10⁴
10⁶
Frequency (Hz)
0
-20
-40
-60
-80
-100
10^-4
10^-2
10⁰
10²
10⁴
10⁶
Frequency (Hz)
In order to decrease the time for the transconductance error amplifier at the secondary to quit the
saturation process and reduce the output voltage overshoot at startup, a Zener diode is required.
The zener diode is connected between the error amplifier output terminal to ground. This reduces
the overshoot and improves the startup performance, because the zener provides a bias current
before the transconductance error amplifier sinks current. Because of the tolerance of the
opto-coupler CTR, the output voltage of the error amplifier under a steady state should not become
too low so as to keep the sufficient output regulation capability.
In the 20V/90W reference design, a 6.8V Zener is selected and output of the error amplifier is set as
about 5 to 6 volts under steady state. The output voltage of the transconductance error amplifier is
around one third of the rated output voltage under steady state.
Doc. No. MV-S104983-01 Rev. A
Page 32
Document Classification: Proprietary
Copyright © 2009 Marvell
October 5, 2009, Preliminary