88EM8040 Datasheet, PDF (27/48 Pages) –

Design and Applications Information
5
Design and Applications Information
The flyback (isolated buck/boost) topology is used to simplify the two stage front-end design to a
single isolated Power Factor Correction (PFC) conversion stage. Compared to the two stage PFC
structure, a single stage PFC is a more cost effective solution.
The 88EM8040/88EM8041 chip control algorithm uses Average Current Mode Control for power
factor correction applications with low harmonic distortion and good noise immunity. The IC senses
the output voltage and forces it to follow the reference voltage to produce a stable DC output voltage
matching the design requirements. It also senses the primary current and forces the average signal
of the primary current to follow the sinusoidal current reference, therefore achieving power factor
correction. Compared to other competitors parts operating under Critical Transition Mode Control,
the 88EM8040/88EM8041 has many advantages as shown in Table 6l
Table 6: Comparison Between Average Current Mode and Critical Transition
Mode Control
Critical Transmition Mode Control
High peak current on switch
High diode peak current at secondary side
Variable switching frequency with lowest
switching frequency at peak input voltage
Big transformer
Low efficiency
Low power factor / higher THD at high line low
load
Difficult to achieve high power
High cost
Average Current Mode Control
Low peak current on switch
Low diode peak current at secondary side
Fixed switching frequency
Small transformer
High efficiency
High power factor / lowerer THD at high line low
load due to adaptive loop control
Easy to achieve high power
Low cost
Marvell's innovative PFC control technology improves the performance of the isolated flyback
converter used in PFC applications. The flyback PFC solution based on the 88EM8040/88EM8041
provides customers with a simple structure, low cost without sacraficing performance compared with
the other industry solutions currently on the market.
The following sections provides guidelines for the application design, component selection, and
board layout all in order to improve flyback single stage PFC performance. There are three analog
input signals and one logic input signal listed below are required from the power train to the
controller IC 88EM8040/88EM8041.
1. Input voltage signal at VIN pin is a half sinusoidal waveform. It is fed into the VIN pin through
the input voltage resistor divider. This is for the line frequency zero-cross detection for PFC.
2. Output voltage signal at FB pin is the output voltage through the resistor divider plus the
compensation and opto-coupler to feedback on FB pin. This is for the voltage loop regulation.
3. Current sensing signal through the sensing resistor to the ISNS pin. This is for the average
current mode control to achieve a good sinusoidal current waveform and high power factor.
4. The input over current protection (OCP) signal is a logic signal instead of an analog signal. It is
used to shut down the output at the SW pin when it is pulled low.
Copyright © 2009 Marvell
October 5, 2009, Preliminary
Document Classification: Proprietary
Doc. No. MV-S104983-01 Rev. A
Page 27