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DS92CK16TMTCX Datasheet, PDF (5/17 Pages) Tyco Electronics – DS92CK16 3V BLVDS 1 to 6 Clock Buffer/Bus Transceiver
DS92CK16
www.ti.com
SNAS044C – NOVEMBER 1999 – REVISED APRIL 2013
Switching Characteristics
Over Supply Voltage and Operating Temperature ranges, unless otherwise specified (1) (2).
Symbol
Parameter
Conditions
Min
DIFFERENTIAL RECEIVER CHARACTERISTICS
tPHLDR
Differential Propagation Delay High to Low. CLKI/O to CLKOUT CL = 15 pF
1.3
tPLHDR
Differential Propagation Delay Low to High. CLKI/O to CLKOUT
VID = 250 mV
Figure 1 Figure 2
1.3
tSK1R
Duty Cycle Distortion(3)
(pulse skew)
|tPLH–tPHL|
tSK2R
Channel to Channel Skew; Same Edge (4)
tSK3R
Part to Part Skew (5)
tTLHR
Transition Time Low to High (6)
(20% to 80% )
0.4
tTHLR
Transition Time High to Low(6)
(80% to 20% )
0.4
tPLHOER
Propagation Delay Low to High
( OEto CLKOUT)
tPHLOER
fMAX
Propagation Delay High to Low
(OE to CLKOUT)
Maximum Operating Frequency (7)
DIFFERENTIAL DRIVER TIMING REQUIREMENTS
CL = 15 pF
Figure 3 Figure 4
1.0
1.0
100
tPHLDD
Differential Propagation Delay High to Low. CrdCLKIN to
CLKI/O
CL = 15 pF
RL = 37.5Ω
0.5
tPLHDD
Differential Propagation Delay Low to High. CrdCLKIN to
CLKI/O
Figure 6 Figure 7
0.5
tPHLCrd
tPLHCrd
tSK1D
tSK2D
tTLHD
tTHLD
CrdCLKIN to CLKOUT Propagation Delay High to Low
CrdCLKIN to CLKOUT Propagation Delay Low to High
Duty Cycle Distortion (pulse skew)
|tPLH–tPHL| (8)
Differential Part-to-Part Skew (9)
Differential Transition Time (6)
(20% to 80% )
Differential Transition Time (6)
(80% to 20% )
CL = 15 pF
2.0
Figure 8 Figure 9
2.0
0.4
0.4
tPHZD
tPLZD
tPZHD
tPZLD
fMAX
Transition Time High to TRI-STATE. DE to CLKI/O
Transition Time Low to TRI-STATE. DE to CLKI/O
Transition Time TRI-STATE to High. DE to CLKI/O
Transition Time TRI-STATE to Low. DE to CLKI/O
Maximum Operating Frequency (7)
VIN = 0V to VCC
CL = 15 pF,
RL = 37.5Ω
Figure 10 Figure 11
100
Typ
2.8
2.9
100
30
1.4
1.3
3
3
125
1.8
1.8
4.5
4.5
0.75
0.75
125
Max Units
3.8
ns
3.8
ns
400
ps
80
ps
2.5
ns
2.4
ns
2.2
ns
4.5
ns
4.5
ns
MHz
2.5
ns
2.5
ns
6.0
ns
6.0
ns
600
ps
2.0
ns
1.4
ns
1.4
ns
10
ns
10
ns
32
ns
32
ns
MHz
(1) CL includes probe and fixture capacitance.
(2) Generator waveform for all tests unless otherwise specified: f = 25 MHz, Zo = 50Ω, tr = 1 ns, tf = 1 ns (10%–90%). To ensure fastest
propagation delay and minimum skew, clock input edge rates should not be slower than 1 ns/V; control signals not slower than 3 ns/V.
In general, the faster the input edge rate, the better the AC performance.
(3) tSK1R is the difference in receiver propagation delay (|tPLH–tPHL|) of one device, and is the duty cycle distortion of the output at any given
temperature and VCC. The propagation delay specification is a device to device worst case over process, voltage and temperature.
(4) tSK2R is the difference in receiver propagation delay between channels in the same device of any outputs switching in the same
direction. This parameter is specified by design and characterization.
(5) tSK3R, part-to-part skew, is the difference in receiver propagation delay between devices of any outputs switching in the same direction.
This specification applies to devices over recommended operating temperature and voltage ranges, and across process distribution.
TSK3R is defined as Max–Min differential propagation delay.This parameter is specified by design and characterization.
(6) All device output transition times are based on characterization measurements and are specified by design.
(7) Generator input conditions: tr/tf < 1 ns, 50% duty cycle, differential (1.10V to 1.35V pk-pk). Output Criteria: 60%/40% duty cycle,
VOL(max) 0.4V, VOH(min) 2.7V, Load = 7 pF (stray plus probes).
(8) tSK1D is the difference in driver propagation delay (|tPLH–tPHL|) and is the duty cycle distortion of the CLKI/O outputs.
(9) tSK2D part-to-part skew, is the difference in driver propagation delay between devices of any outputs switching in the same direction.
This specification applies to devices over recommended operating temperature and voltage ranges, and across process distribution.
tSK2D is defined as Max–Min differential propagation delay.
Copyright © 1999–2013, Texas Instruments Incorporated
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