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M02094-12 Datasheet, PDF (33/46 Pages) M/A-COM Technology Solutions, Inc. – EPON FTTH modules
M02094-12
3.3 or 5 Volt VCSEL/FP Laser Driver IC for Applications to 2 Gbps
Rev V5
The VCSEL driver output stage is separately grounded from the rest of the circuitry (through GND0). At higher data
rates (above 2Gb/s) GND0 may be connected to ground through a minimum of 2 nH of inductance to improve the
transient response. A ferrite can also provide the extra isolation (Murata BLM18HG471SN1 or equivalent recom-
mended).
Figure 3-4. Modulator Output
0.4pF
0.75 nH * OUT-
0.75 nH *
OUT+
OUT+ and OUT- should not be
driven below 0.7V
GND0
(optional
external
inductance)
* Denotes bond
wire internal to
MLF package
3.3.9
Fail Output
The M02094 has a FAIL alarm output which is compatible with the TX_FAULT signalling requirements of common
pluggable module standards.
The ESD protection on this pin provides a true open collector output that can withstand significant variation in VCC
when signalling between circuit boards. Also, if the M02094 loses power the FAIL output will continue to pull up and
signal a fail condition. In a simple static protection scheme used by other ICs the protection diodes would clamp the
FAIL signal to ground when the chip loses power.
3.3.10
TX Disable and Disable Delay Control
The DIS pin is used to disable the transmit signal. When the transmit is disabled both the bias and modulation cur-
rents are off.
The DIS input is compatible with TTL levels regardless of whether VCC = 5V or VCC = 3.3V. In most module appli-
cations a pull-up resistor to VCC between 4.7 kΩ and 10 kΩ is required. Because this pin has an internal 7 kΩ
resistor to VCC, no external pull-up resistor is required.
The DISDLY pin is used in conjunction with the DIS pin to control bias current enable time. (The modulation current
enable time is always less than 600 ns). Unless the DISDLY pin is programmed for burst mode, the APC loop
enable time will be slow (less than 1 ms with a CAPC = 2.2 nF).
When a capacitor C is added to the DISDLY pin, the slow-start circuitry is disabled for typically
33
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