M02069 Datasheet, PDF (29/44 Pages) M/A-COM Technology Solutions, Inc. – 3.3 or 5 Volt VCSEL/FP Laser Driver IC for Applications to 4.3 Gbps

Functional Description
Figure 3-4. Modulator Output
0.4pF
0.75 nH * OUT-
0.75 nH *
OUT +
OUT+ and OUT- should not be
driven below 0.7V
GND ₀
(o p ti o n al
external
i n d u cta n ce )
* Denotes bond
wire internal to
MLF package
3.3.9
Fail Output
The M02069 has a FAIL alarm output which is compatible with the TX_FAULT signalling requirements of common
pluggable module standards.
The ESD protection on this pin provides a true open collector output that can withstand significant variation in V_CC
when signalling between circuit boards. Also, if the M02069 loses power the FAIL output will continue to pull up
and signal a fail condition. In a simple static protection scheme used by other ICs the protection diodes would
clamp the FAIL signal to ground when the chip loses power.
3.3.10
TX Disable and Disable Delay Control
The DIS pin is used to disable the transmit signal. When the transmit is disabled both the bias and modulation cur-
rents are off.
The DIS input is compatible with TTL levels regardless of whether VCC = 5V or VCC = 3.3V. In most module appli-
cations a pull-up resistor to VCC between 4.7kΩ and 10kΩ is required. Because this pin has an internal 7kΩ resis-
tor to V_CC, no external pull-up resistor is required.
The DISDLY pin is used in conjunction with the DIS pin to control bias current enable time. (The modulation current
enable time is always less than 600 ns). Unless the DISDLY pin is programmed for burst mode, the APC loop
enable time will be slow (less than 1 ms with a C_APC = 2.2nF).
When a capacitor C is added to the DISDLY pin, the slow-start circuitry is disabled for typically
T = 3 * 10⁶ (sec/F)* C (F)
following the DIS high transition. If DIS transitions low during this time, the bias current will quickly return to within
90% of its final value (within less than 500ns). If DIS transitions low after this time the slow-start circuitry will
engage and the bias current will not return to its final value for approximately 1ms (depending on the C_APC capaci-
tor).
3.3.11
Burst Mode Operation (Figure 3-5)
The M02069 will meet the timing requirements of EPON with the addition of a capacitor at DISDLY (see paragraph
above and Figure 3-5).
02069-DSH-001-D
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