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28560-DSH-001-B_15 Datasheet, PDF (242/274 Pages) M/A-COM Technology Solutions, Inc. – HDLC Controller
TSBUS
CX28560 Data Sheet
D.2.2
Transmit Timing
The TSBUS device operates as the master of the Transmit TSBUS, and the
CX28560 device responds as slave. The TSBUS generates clock, Frame sync
signal, and Stuff signal. CX28560 will generate Transmit data (TSB_TDAT) or
generate an all-1s Stuff pattern eight time slots after receiving an active Stuff
signal. The TSBUS will generate a Frame sync Strobe (TSB_STB) output
synchronously with the rising edge of TSB_CLK. Figure D-3 illustrates the
timing requirements for the Transmit. Figure D-3 illustrates the Stuff signal. The
target timing values are listed in Table D-4.
Figure D-3. Payload Time Slot Bus Transmit Data (TSB_TDAT)
Tper
Tpwh
Tpwl
TSB_CLK
TSB_TDAT
Transmit Bit n
Ts
Th
Transmit Bit n+1
Transmit Bit n+2
D-8
Mindspeed Technologies™
28560-DSH-001-B
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