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LTC4008 Datasheet, PDF (9/24 Pages) Linear Technology – 4A, High Efficiency, Multi-Chemistry Battery Charger
U
OPERATIO
Input FET (LTC4008)
The input FET circuit performs two functions. It enables
the charger if the input voltage is higher than the CLP pin
and provides the logic indicator of AC present on the
ACP/SHDN pin. It controls the gate of the input FET to keep
a low forward voltage drop when charging and also
prevents reverse current flow through the input FET.
If the input voltage is less than VCLP, it must go at least
170mV higher than VCLN to activate the charger. When this
occurs the ACP/SHDN pin is released and pulled up with
an external load to indicate that the adapter is present. The
gate of the input FET is driven to a voltage sufficient to keep
a low forward voltage drop from drain to source. If the
voltage between DCIN and CLP drops to less than 25mV,
the input FET is turned off slowly. If the voltage between
DCIN and CLP is ever less than – 25mV, then the input FET
is turned off in less than 10µs to prevent significant
reverse current from flowing in the input FET. In this
condition, the ACP/SHDN pin is driven low and the charger
is disabled.
Input FET (LTC4008-1)
The input FET circuit is disabled for the LTC4008-1. There
is no low current shutdown mode when DCIN falls below
the CLP pin. The ACP/SHDN pin functions only to shut
down the charger.
Battery Charger Controller
The LTC4008 charger controller uses a constant off-time,
current mode step-down architecture. During normal op-
eration, the top MOSFET is turned on each cycle when the
oscillator sets the SR latch and turned off when the main
current comparator ICMP resets the SR latch. While the top
MOSFET is off, the bottom MOSFET is turned on until
either the inductor current trips the current comparator
IREV or the beginning of the next cycle. The oscillator uses
the equation:
tOFF
=
VDCIN –
VDCIN •
VBAT
fOSC
to set the bottom MOSFET on time. This activity is dia-
grammed in Figure 1.
LTC4008
OFF
TGATE
ON
ON
BGATE
OFF
tOFF
TRIP POINT SET BY ITH VOLTAGE
INDUCTOR
CURRENT
Figure 1
4008 F01
The peak inductor current, at which ICMP resets the SR
latch, is controlled by the voltage on ITH. ITH is in turn
controlled by several loops, depending upon the situation
at hand. The average current control loop converts the
voltage between CSP and BAT to a representative current.
Error amp CA2 compares this current against the desired
current programmed by RPROG at the PROG pin and
adjusts ITH until:
VREF = VCSP – VBAT + 11.67µA • 3.01kΩ
RPROG
3.01kΩ
therefore,
ICHARGE(MAX)
=
⎛
⎝⎜
VREF
RPROG
–
11.67µA⎞⎠⎟
•
3.01kΩ
RSENSE
The voltage at BATMON is divided down by an external
resistor divider and is used by error amp EA to decrease
ITH if the divider voltage is above the 1.19V reference.
When the charging current begins to decrease, the voltage
at PROG will decrease in direct proportion. The voltage at
PROG is then given by:
( ) VPROG =
ICHARGE • RSENSE + 11.67µA • 3.01kΩ
• RPROG
3.01kΩ
The accuracy of VPROG will range from 0% to ITOL.
VPROG is plotted in Figure 2.
The amplifier CL1 monitors and limits the input current,
normally from the AC adapter to a preset level (100mV/
RCL). At input current limit, CL1 will decrease the ITH
voltage, thereby reducing charging current. The ICL indica-
tor output will go low when this condition is detected and
the FLAG indicator will be inhibited if it is not already low.
4008fa
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