LTC3706_15 Datasheet, PDF (9/22 Pages) Linear Technology – Secondary-Side Synchronous Forward Controller with PolyPhase Capability

LTC3706
OPERATION
Main Control Loop
The LTC3706 is designed to work in a constant frequency,
current mode 2-transistor forward converter. During
normal operation, the primary-side MOSFETs (both top
and bottom) are “clocked” on together with the forward
MOSFET on the secondary side. This applies the reflected
input voltage across the inductor on the secondary side.
When the current in the inductor has ramped up to the
peak value as commanded by the voltage on the ITH pin,
the current sense comparator is tripped, turning off the
primary-side and forward MOSFETs. To avoid turning
on the synchronous MOSFET prematurely and causing
shoot-through, the voltage on the SW pin is monitored.
This voltage will usually fall below 0V soon after the
primary-side MOSFETs have turned completely off. When
this condition is detected, the synchronous MOSFET is
quickly turned on, causing the inductor current to ramp
back downwards. The error amplifier senses the output
voltage, and adjusts the ITH voltage to obtain the peak
current needed to maintain the desired main-loop output
voltage. The LTC3706 always operates in a continuous
current, synchronous switching mode. This ensures a rapid
transient response as well as a stable bias supply voltage
at light loads. A maximum duty cycle (either 50% or 75%)
is internally set via clock dividers to prevent saturation of
the main transformer. In the event of an overvoltage on
the output, the synchronous MOSFET is quickly turned on
to help protect critical loads from damage.
Gate Drive Encoding
Since the LTC3706 controller resides on the secondary side
of an isolation barrier, communication to the primary-side
power MOSFETs is generally done through a transformer.
Moreover, it is often necessary to generate a low voltage
bias supply for the primary-side gate drive circuitry. In
order to reduce the number of isolated windings present
in the system, the LTC3706 uses a proprietary scheme
to encode the PWM gate drive information and multiplex
it together with bias power for the primary-side drive
and control, using a single pulse transformer. Note that,
unlike optoisolators and other modulation techniques, this
multiplexing scheme does not introduce a significant time
delay into the system.
For most forward converter applications, the PT⁺ and
PT^– outputs will contain a pulse-encoded PWM signal.
These outputs are driven in a complementary fashion with
an essentially constant 50% duty cycle. This results in a
stable volt-second balance as well as an efficient transfer
of bias power across the pulse transformer. As shown in
Figure 1, the beginning of the positive half-cycle coincides
with the turn-on of the primary-side MOSFETs. Likewise,
the beginning of the negative half-cycle coincides with
the maximum duty cycle (forced turn-off of primary
switches). At the appropriate time during the positive
half-cycle, the end of the on-time (PWM going LOW) is
signaled by briefly applying a zero volt differential across
the pulse transformer. Figure 1 illustrates the operation
of this multiplexing scheme.
The LTC3705 primary-side controller and gate driver will
decode this PWM information as well as extract the power
needed for primary-side gate drive.
DUTY CYCLE = 15%
150ns
7V
DUTY CYCLE = 0%
150ns
7V
V_PT1+ – V_PT1–
–7V
1 CLK PER
–7V
3706 F01
1 CLK PER
Figure 1. Gate Drive Encoding Scheme (V_MODE = GND)
3706fd
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