LTC3706_15 Datasheet, PDF (11/22 Pages) Linear Technology – Secondary-Side Synchronous Forward Controller with PolyPhase Capability

LTC3706
OPERATION
Frequency Setting and Synchronization
The LTC3706 uses a single pin to set the operating
frequency, or to synchronize the internal oscillator to a
reference clock with an on-chip phase-locked loop (PLL).
The FS pin may be tied to GND, V_CC or have a single
resistor to GND to set the switching frequency. If a clock
signal (>2V) is detected at the FS pin, the LTC3706 will
automatically synchronize to the rising edge of the reference
clock. Table 2 summarizes the operation of the FS pin.
For synchronization between multiple LTC3706s, the
PT⁺ pin of one LTC3706 can be used as a master clock
reference and tied to the FS pin of the other LTC3706s.
Table 2
FS PIN
SWITCHING FREQUENCY
GND
200kHz
V_CC
R_FS to GND
Reference Clock
300kHz
f_OSC (Hz) = 4R_FS – 200k
f_OSC = f_REF (75kHz to 500kHz)
This will cause all LTC3706’s to operate at the same fre-
quency. The phase angle of each LTC3706 that is being
synchronized can be set by using the PHASE pin. This pin
can be tied to GND, V_CC or have a single resistor to V_CC
to set the phase angle (delay) of the internal oscillator
relative to the incoming sync signal on the FS pin. Any
one of five preset values can be selected as summarized
in Table 3.
Table 3
PHASE PIN
GND
V_CC
226kΩ to V_CC
113kΩ to V_CC
56.2kΩ to V_CC
LTC3706 PHASE DELAY
0°
180°
60°
90°
120°
Soft-Start
The soft-start circuitry has five functions: 1) to provide
a shutdown, 2) to provide a smooth ramp on the output
voltage during start-up, 3) to limit the output current in
a short-circuit situation by entering a hiccup mode, 4) to
limit the maximum power dissipation in the external linear
regulator via the REGSD pin, and 5) to communicate fault
and shutdown information between multiple LTC3706s in
a PolyPhase application.
When the RUN/SS pin is pulled to GND, the chip is placed
into shutdown mode. If this pin is released, the RUN/SS
pin is initially charged with a 50µA current source. After
the RUN/SS pin gets above 0.5V, the chip is enabled. At
the instant that the LTC3706 is first enabled, the RUN/SS
voltage is rapidly preset to a voltage that will correspond
to the main output voltage of the DC/DC converter. (See
the Self-Starting Architecture section.) After this preset
interval has completed, the normal soft-start interval begins
and the charging current is reduced to 5µA. The external
soft-start voltage is used to internally ramp up the 0.6V
reference (positive) input to the error amplifier. When fully
charged, the RUN/SS voltage remains at 3V.
In the event that the sensed switch or inductor current
exceeds the overcurrent trip threshold, an internal fault
latch is tripped. This latch is also tripped when the REGSD
voltage exceeds 4V (see the Linear Regulator section).
When such a fault is detected, the LTC3706 immediately
goes to zero duty cycle and initiates a soft-start retry.
Prior to discharging the soft-start capacitor, however, the
LTC3706 first puts a voltage pulse on the RUN/SS pin, which
trips the fault latch in any other LTC3706 that shares the
RUN/SS. This ensures an orderly shutdown of all phases
in a PolyPhase application. After the soft-start capacitor
is fully discharged, the LTC3706 attempts a restart. If the
fault is persistent, the system enters a “hiccup” mode.
3706fd
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