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LTC3785-1 Datasheet, PDF (8/20 Pages) Linear Technology – 10V, High Effi ciency, Buck-Boost Controller with Power Good
LTC3785-1
OPERATION
MAIN CONTROL LOOP
The LTC3785-1 is a buck-boost voltage mode controller
that provides an output voltage above, equal to or below
the input voltage.
The LTC proprietary topology and control architecture also
employs drain-to-source sensing (No RSENSE) for forward
and reverse current limiting. The controller provides all
N-channel MOSFET output switch drive, facilitating single
package multiple power switch technology along with lower
RDS(ON). The error amp output voltage (VC) determines the
output duty cycle of the switches. Since the VC pin is a filtered
signal, it provides rejection of high frequency noise.
The FB pin receives the voltage feedback signal, which
is compared to the internal reference voltage by the er-
ror amplifier. The top MOSFET drivers are biased from a
floating bootstrap capacitor, which is normally recharged
during each off cycle through an external diode when the
top MOSFET turns off. Optional Schottky diodes can be
connected across synchronous switch B and D to provide
a lower drop during the dead time and eliminate efficiency
loss due to body diode reverse recovery.
The main control loop is shut down by pulling the RUN/
SS pin low. An internal 1μA current source charges the
RUN/SS pin and when the pin voltage is higher than 0.7V
the IC is enabled. The VC voltage is then clamped to the
RUN/SS voltage minus 0.7V while CSS is slowly charged
during start-up. This “soft-start” clamping prevents inrush
current draw from the input power supply.
POWER SWITCH CONTROL
Figure 1 shows a simplified diagram of how the four power
switches are connected to the inductor, VIN, VOUT and GND.
Figure 2 shows the regions of operation for the LTC3785-1
as a function of duty cycle D. The power switches are
properly controlled so that the transfer between modes
is continuous.
Buck Region (VIN > VOUT)
Switch D is always on and switch C is always off during
buck mode. When the error amp output voltage, VC, is
approximately above 0.1V, output A begins to switch. During
the off time of switch A, synchronous switch B turns on for
8
VIN
VOUT
TG1
A
D
TG2
SW1 L SW2
BG1
B
C
BG2
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Figure 1. Response Time Test Circuit
90%
DMAX
BOOST
DMIN
BOOST
DMAX
BUCK
DMIN
BUCK
A ON, B OFF
PWM C, D SWITCHES
FOUR SWITCH PWM
D ON, C OFF
PWM A, B SWITCHES
BOOST REGION
BUCK/BOOST REGION
BUCK REGION
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Figure 1. Response Time Test Circuit
the remainder of the switching period. Switches A and B will
alternate similar to a typical synchronous buck regulator.
As the control voltage increases, the duty cycle of switch
A increases until the max duty cycle of the converter in
buck mode reaches DMAX_BUCK, given by:
DMAX_BUCK = 100 – D4(SW)%
where D4(SW) = duty cycle % of the four switch range.
D4(SW) = (300ns • f) • 100%
where f = operating frequency, Hz.
Beyond this point the “four switch” or buck-boost region
is reached.
Buck-Boost or Four Switch (VIN ~ VOUT)
When the error amp output voltage, VC, is above ap-
proximately 0.65V, switch pair AD remain on for duty
cycle DMAX_BUCK, and the switch pair AC begin to phase
in. As switch pair AC phases in, switch pair BD phases
out accordingly. When the VC voltage reaches the edge of
the buck-boost range, approximately 0.7V, the AC switch
pair completely phase out the BD pair, and the boost phase
begins at duty cycle, D4(SW).
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