LTC3600_15 Datasheet, PDF (8/28 Pages) Linear Technology – 15V, 1.5A Synchronous Rail-to-Rail Single Resistor Step-Down Regulator

LTC3600
Pin Functions
ISET (Pin 1): Accurate 50µA Current Source. Positive input
to the error amplifier. Connect an external resistor from this
pin to signal GND to program the V_OUT voltage. Connecting
an external capacitor from ISET to ground will soft start
the output voltage and reduce current inrush when turning
on. V_OUT can also be programmed by driving ISET directly
with an external supply from 0 to V_IN, in which case the
external supply would be sinking the provided 50µA. Do
not drive V_ISET above V_IN or below GND. Do not float ISET.
ITH (Pin 2): Error Amplifier Output and Switching
Regulator Compensation Point. The internal current
comparator’s trip threshold is linearly proportional to
this voltage, whose normal range is from 0.3V to 2.4V.
For external compensation, tie a resistor (R_ITH) in series
with a capacitor (C_ITH) to signal GND. A separate 10pF
high frequency filtering capacitor can also be placed
from ITH to signal GND. Tying ITH to INTV_CC activates
internal compensation.
RT (Pin 3): Switching Frequency Programming Pin. Con-
nect an external resistor (between 200k to 10k) from RT
to SGND to program the frequency from 200kHz to 4MHz.
Tying the RT pin to INTV_CC programs 1MHz operation.
Do not float the RT pin.
PGFB (Pin 4): Power Good Feedback. Place a resistor
divider on V_OUT to detect power good level. If PGFB is
more than 0.645V, or less than 0.555V, PGOOD will be
pulled down. Tie PGFB to INTV_CC to disable the PGOOD
function. Tying PGFB to a voltage greater than 0.64V and
less than 4V will force continuous synchronous operation
regardless of the MODE/SYNC state.
RUN (Pin 5): Run Control Input. Enables chip operation by
tying RUN above 1.55V. Tying it below 1V shuts down the
switching regulator. Tying it below 0.4V shuts off the entire
chip. When tying RUN to more than 12V, place a resistor
(100k to 500k) between RUN and the voltage source.
MODE/SYNC (Pin 6): Operation Mode Select. Tie this pin
to INTV_CC to force continuous synchronous operation at
all output loads. Tying it to GND enables discontinuous
mode operation at light loads. Applying an external clock
signal to this pin will synchronize switching frequency
to the external clock. During external clock synchroniza-
tion, R_T value should be set up such that the free running
frequency is within 30% of the external clock frequency.
SW (Pin 7): Switch Node Connection to External Inductor.
Voltage swing of SW is from a diode voltage drop below
ground to V_IN.
V_IN (Pin 8): Input voltage. Must decouple to GND with a
capacitor close to the V_IN pin.
BOOST (Pin 9): Boosted Floating Driver Supply for Inter-
nal Top Power MOSFET. The (+) terminal of the bootstrap
capacitor connects here. This pin swings from a diode
voltage drop below INTV_CC up to V_IN + INTV_CC.
INTV_CC (Pin 10): Internal 5V Regulator Output. The internal
power drivers and control circuits are powered from this
voltage. Decouple this pin to GND with a minimum of 1µF
low ESR ceramic capacitor.
V_OUT (Pin 11): Output Voltage Pin. Output of the LTC3600
voltage regulator. Also the negative input of the error
amplifier which is driven to be the same voltage as ISET.
PGOOD (Pin 12): Output Power Good with Open-Drain
Logic. PGOOD is pulled to ground when the PGFB pin is
more than 0.645V or less than 0.555V. PGOOD open-drain
logic will be disabled if PGFB is tied to INTV_CC.
GND (Exposed Pad Pin 13): Ground. Return path of internal
power MOSFETs. Connect the exposed pad to the negative
terminal of the input capacitor and output capacitor.
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