LTC3600_15 Datasheet, PDF (11/28 Pages) Linear Technology – 15V, 1.5A Synchronous Rail-to-Rail Single Resistor Step-Down Regulator

LTC3600
Operation
R_T value should be selected such that the external clock
frequency is within this 30% range of the R_T programmed
frequency.
Output Voltage Tracking and Soft Start
The LTC3600 allows the user to program its output voltage
ramp rate by means of the ISET pin. Since V_OUT servos its
voltage to that of the ISET pin, placing an external capaci-
tor C_SET on the ISET pin will program the ramp-up rate of
the ISET pin and thus the V_OUT voltage.
V_OUT(t) = I_ISET • R_SET
_1−
e
−
R_SET
t
•
C _SET




fro m 0 to 9 0 % V_OUT
t _SS ≅ − R_SET • C_SET • n(1− 0 .9)
t _SS  2 .3R_SET • C_SET
The soft-start time t_SS (from 0% to 90% V_OUT) is 2.3
times of time constant (R_SET • C_SET). The ISET pin can
also be driven by an external voltage supply capable of
sinking 50µA.
When starting up into a pre-biased V_OUT, the LTC3600 will
stay in discontinuous mode and keep the power switches
off until the voltage on ISET has ramped up to be equal
to V_OUT, at which point the switcher will begin switching
and V_OUT will ramp up with ISET.
Output Power Good
When the LTC3600’s output voltage is within the 7.5%
window of the regulation point, which is reflected back
as a V_PGFB voltage in the range of 0.555V to 0.645V, the
output voltage is in regulation and the PGOOD pin is
pulled high with an external resistor connected to INTV_CC
or another voltage rail. Otherwise, an internal open-drain
pull-down device (200Ω) will pull the PGOOD pin low.
To prevent unwanted PGOOD glitches during transients
or dynamic V_OUT changes, the LTC3600’s PGOOD falling
edge includes a blanking delay of approximately 20µs.
Internal/External ITH Compensation
For ease of use, the user can simplify the loop compen-
sation by tying the ITH pin to INTV_CC to enable internal
compensation. This connects an internal 100k resistor
in series with a 50pF capacitor to the output of the error
amplifier (internal ITH compensation point). This is a
trade-off for simplicity instead of OPTI-LOOP^® optimiza-
tion, where ITH components are external and are selected
to optimize the loop transient response with minimum
output capacitance.
Minimum Off-Time Considerations
The minimum off-time, t_OFF(MIN), is the smallest amount
of time that the LTC3600 is capable of turning on the bot-
tom power MOSFET, tripping the current comparator and
turning the power MOSFET back off. This time is generally
about 50ns. The minimum off-time limit imposes a maxi-
mum duty cycle of t_ON/(t_ON + t_OFF(MIN)). If the maximum
duty cycle is reached, due to a dropping input voltage
for example, then the output will drop out of regulation.
The minimum input voltage to avoid dropout is:
V_{I N(M I N)}
=
V_{O U T}
•
t_ON
+ t_OFF(MIN)
t_ON
Conversely, the minimum on-time is the smallest dura-
tion of time in which the top power MOSFET can be in
its “on” state. This time is typically 20ns. In continuous
mode operation, the minimum on-time limit imposes a
minimum duty cycle of:
D_MIN = f_SW • t_ON(MIN)
Where t_ON(MIN) is the minimum on-time. As the equation
shows, reducing the operating frequency will alleviate the
minimum duty cycle constraint.
In the rare cases where the minimum duty cycle is sur-
passed, the output voltage will still remain in regulation, but
the switching frequency will decrease from its programmed
value. This is an acceptable result in many applications, so
this constraint may not be of critical importance in most
cases. High switching frequencies may be used in the
design without any fear of severe consequences. As the
sections on inductor and capacitor selection show, high
switching frequencies allow the use of smaller board com-
ponents, thus reducing the size of the application circuit.
3600fc
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