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LTC3538 Datasheet, PDF (8/16 Pages) Linear Technology – 800mA Synchronous Buck-Boost DC/DC Converter
LTC3538
OPERATION
The LTC3538 provides high efficiency, low noise power
for a wide variety of handheld electronic devices. The LTC
proprietary topology allows input voltages above, below
and equal to the output voltage through proper phasing
of the four on-chip MOSFET switches. The error amplifier
output voltage on VC determines the output duty cycle of the
switches. Since VC is a filtered signal, it provides rejection
of frequencies from well below the switching frequency.
The low RDS(ON), low gate charge synchronous switches
provide high frequency pulse width modulation control at
high efficiency. High efficiency is achieved at light loads
when Burst Mode operation is selected.
LOW NOISE FIXED FREQUENCY OPERATION
Operating Frequency
The operating frequency is internally fixed to 1MHz to
maximize overall converter efficiency while minimizing
external component size.
Error Amplifier
The error amplifier controls the duty cycle of the internal
switches. The loop compensation components are con-
figured around the amplifier to provide converter loop
stability. Pulling down the output of the error amplifier
(VC) below 0.25V will disable the LTC3538. In shutdown
the LTC3538 will draw only 1.5μA typical from the input
supply. During normal operation the VC pin should be
allowed to float.
Soft-Start
The converter has an internal voltage mode soft-start
circuit with a nominal duration of 1.5ms. The converter
remains in regulation during soft-start and will therefore
respond to output load transients that occur during this
time. In addition, the output voltage risetime has minimal
dependency on the size of the output capacitor or load.
During soft-start, the converter is forced into PWM
operation regardless of the state of the BURST pin.
Internal Current Limit
There are two current limit circuits in the LTC3538. The first
is a high speed peak current limit amplifier that will shut
off switch A once the input current exceeds ~ 3.5A typical.
The delay to output of this amplifier is typically 50ns.
The second current limit sources current out of the FB pin
to drop the output voltage once the input average current
exceeds 2A typical. This method provides a closed loop
means of clamping the input current. During conditions
when VOUT is near ground, such as during a short circuit
or during start-up, this threshold is cut to 1A typical,
providing a foldback feature to limit power dissipation. For
this current limit feature to be most effective, the Thevenin
resistance (typically the parallel combination of R1 and
R2) from FB to ground should be greater than 100k.
Reverse Current Limit
During fixed frequency operation, the LTC3538 operates in
forced continuous conduction mode. The reverse current
limit comparator monitors the inductor current from the
output through switch D. Should this negative inductor
current exceed 500mA typical, the LTC3538 shuts off
switch D.
Four-Switch Control
VIN
VOUT
8
5
PMOS A
SW1
L1
7
PMOS D
SW2
6
NMOS B
NMOS C
3538 FO1
Figure 1. Simplified Diagram of Output Switches
Figure 1 shows a simplified diagram of how the four internal
switches are connected to the inductor, VIN, VOUT and GND.
Figure 2 shows the regions of operation for the LTC3538
as a function of the internal control voltage.
3538fb
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