LTC3424_15 Datasheet, PDF (8/12 Pages) Linear Technology – Low Output Voltage, 3MHz Micropower Synchronous Boost Converters

LTC3423/LTC3424
APPLICATIO S I FOR ATIO
The inductor current ripple is typically set to 20% to 40%
of the maximum inductor current.
For high efficiency, choose an inductor with a high fre-
quency core material, such as ferrite, to reduce core
losses. The inductor should have low ESR (equivalent
series resistance) to reduce the I²R losses and must be
able to handle the peak inductor current at full load without
saturating. Molded chokes or chip inductors usually do
not have enough core to support the peak inductor cur-
rents in the 1A to 2A region. To minimize radiated noise,
use a toroid, pot core or shielded bobbin inductor. See
Table 1 for a list of component suppliers.
Table 1. Inductor Vendor Information
SUPPLIER PHONE
FAX
Coilcraft
[phone] [phone]
Coiltronics [phone] [phone]
Murata
[phone] [phone]
[phone]
Sumida
USA: [phone] [phone]
Japan: 81-3-3607-5111 81-3-3607-5144
WEBSITE
www.coilcraft.com
www.coiltronics.com
www.murata.com
www.japanlink.com
sumida
R_t SHDN
MODE V_C
V_IN
FB
SW V_OUT
GND V_DD
V_DD IN
2.7V
TO 5.5V
where
I_L = Average Inductor Current
I_P = Peak Inductor Current
The ESR is usually the most dominant factor for ripple in
most power converters. The ripple due to capacitor ESR is
simply given by:
VR_CESR = I_P • R_ESR Volts
where
R_ESR = Capacitor Series Resistance
Low ESR capacitors should be used to minimize output
voltage ripple. For surface mount applications, AVX TPS
series tantalum capacitors and Sanyo POSCAP or Taiyo-
Yuden ceramic capacitors are recommended. For through-
hole applications Sanyo OS-CON capacitors offer low ESR
in a small package size. See Table 2 for a list of component
suppliers.
In some layouts it may be required to place a 1µF low ESR
capacitor as close to the V_OUT and GND pins as possible.
Table 2. Capacitor Vendor Information
SUPPLIER PHONE
FAX
AVX
[phone] [phone]
Sanyo
[phone] [phone]
Taiyo Yuden [phone] [phone]
WEBSITE
www.avxcorp.com
www.sanyovideo.com
www.t-yuden.com
V_OUT
3423/24 F01
Figure 1. Recommended Component Placement. Traces
Carrying High Current Are Direct. Trace Area FB and V_C Pins
Are Kept Low. Lead Length to Battery Should be Kept Short
Output Capacitor Selection
The output voltage ripple has several components. The
bulk value of the capacitor is set to reduce the ripple due
to charge into the capacitor each cycle. The max ripple due
to charge is given by:
VR_BULK
=
I_L • V_IN(V_OUT – V_IN)
C_OUT • V_OUT • V_OUT • f
Volts
8
Input Capacitor Selection
The input filter capacitor reduces peak currents drawn from
the input source and reduces input switching noise. In most
applications a 3.3µF is sufficient.
Output Diode
The Schottky diode across the synchronous PMOS switch
is not required, but provides a lower drop during the break-
before-make time (typically 20ns) of the NMOS to PMOS
transition. The addition of the Schottky diode will improve
peak efficiency (see graph “Efficiency Loss Without
Schottky vs Frequency”). Use of a Schottky diode such as
a MBRM120T3, 1N5817 or equivalent. Since slow recov-
ery times will compromise efficiency, do not use ordinary
rectifier diodes.
34234f