LTC1662_15 Datasheet, PDF (8/16 Pages) Linear Technology – Ultralow Power, Dual 10-Bit DAC in MSOP

LTC1662
Timing Diagram
SCK
SDI
CS/LD
t₁
t₂
t₃
t₄
t₆
t₉
t₁₁
A3
A2
A1
X1
X0
t₅
t₇
1662 TD
Operation
SCK
SDI
CS/LD
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15 16
A3 A2 A1 A0 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 X1 X0
CONTROL CODE
(SCK ENABLED)
INPUT CODE
INPUT WORD W₀
DON’T CARE
Figure 1. Register Loading Sequence
(INSTRUCTION
EXECUTED) 1662 F01
1662fa
8