LTC1143L_15 Datasheet, PDF (8/20 Pages) Linear Technology – Dual High Efficiency SO-16 Step-Down Switching Regulator Controllers

LTC1143/LTC1143L
LTC1143L-ADJ
U
OPERATION Refer to Functional Diagram and Figure 1
The circuit now enters sleep mode with the power MOSFET
turned off. In sleep mode a majority of the circuitry is
turned off, dropping the quiescent current from 1.6mA to
160µA (for one regulator block). The load current is now
being supplied from the output capacitor. When the output
voltage has dropped by the amount of hysteresis in
comparator V, the P-channel MOSFET is again turned on
and the process repeats.
To avoid the operation of the current loop interfering with
Burst Mode operation, a built-in offset (V_OS) is incorpo-
rated in the gain stage. This prevents the current compara-
tor threshold from increasing until the output voltage has
dropped below a minimum threshold.
Using constant off-time architecture the operating fre-
quency is a function of the input voltage. To minimize the
frequency variation as dropout is approached, the off-time
controller increases the C_T discharge current as V_IN drops
below V_OUT + 1.5V. In dropout the P-channel MOSFET is
turned on continuously (100% duty cycle), providing
extremely low dropout operation.
APPLICATIONS INFORMATION
The basic LTC1143L-ADJ application circuit is shown in
Figure 1. The LTC1143 and LTC1143L are similar but omit
the external resistive V_OUT dividers (see Figures 10 and
13). External component selection is driven by the load
requirement and begins with V_OUT and the selection of
R_SENSE. Once R_SENSE is known, C_T and L can be chosen.
Next, the power MOSFET and D1 are selected. Finally, C_IN
and C_OUT are selected and the loop is compensated. Since
the two regulator sections are identical, the process of
component selection is the same for both sections. The
circuit shown in Figure 1 can be configured for operation
up to an input voltage of 16V.
Output Voltage Selection
The LTC1143/LTC1143L output voltages are internally set
to 3.3V and 5V. The LTC1143L-ADJ requires an external
resistive divider from V_OUT to V_FB on each section as
shown in Figure 1. The regulated LTC1143L-ADJ output
voltages are given by:
V_OUT1
=
1.25

¹⁺
R2^
R1
V_OUT2
=
1.25

¹⁺
R4^
R3
To prevent stray pickup, a 100pF capacitor is suggested
across R1 and R3 located close to the LTC1143L-ADJ.
For Figure 1 applications with V_OUT below 2V, or when
R_SENSE is moved to ground, the current sense comparator
inputs operate near ground. When the current comparator
is operated at less than 2V common mode, the off-time
increases approximately 40%, requiring the use of a
smaller timing capacitor C_T.
R_SENSE Selection for Output Current
R_SENSE is chosen based on the required output current.
The LTC1143 series current comparators have a threshold
range that extends from a minimum of 25mV/R_SENSE to a
maximum of 150mV/R_SENSE. The current comparator
threshold sets the peak of the inductor ripple current,
yielding a maximum output current I_MAX equal to the peak
value less half the peak-to-peak ripple current. For proper
Burst Mode operation, I_RIPPLE(P-P) must be less than or
equal to the minimum current comparator threshold.
Since efficiency generally increases with ripple current,
the maximum allowable ripple current is assumed, i.e.,
I_RIPPLE(P-P) = 25mV/R_SENSE. (See C_T and L Selection for
Operating Frequency). Solving for R_SENSE and allowing a
margin for variations in the LTC1143 series and external
component values yields:
R_SENSE
=
100mV
I_MAX
A graph for selecting R_SENSE versus maximum output
current is given in Figure 2.
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