LTC1143L_15 Datasheet, PDF (11/20 Pages) Linear Technology – Dual High Efficiency SO-16 Step-Down Switching Regulator Controllers

LTC1143/LTC1143L
LTC1143L-ADJ
APPLICATIONS INFORMATION
but δ = 0.005/°C can be used as an approximation for low
voltage MOSFETs.
When selecting the P-channel power MOSFET for each
section, consideration should be given to using a dual MOSFET
with the other half used for the second regulator. Assuming
both sections are operating at similar currents, the required
R_DS(ON) will be half the value of a single MOSFET to stay within
the package dissipation limit. Remember that worst-case
MOSFET dissipation occurs at minimum V_IN.
Output Diode Selection (D1, D2)
The Schottky diodes D1 and D2 shown in Figure 1 conduct
during the off-time. It is important to adequately specify
the diode peak current and average power dissipation to
not exceed the diode ratings.
The most stressful condition for the output diode is under
short circuit (V_OUT = 0V). Under this condition the diode
must safely handle I_SC(PK) at close to 100% duty cycle.
Under normal load conditions the average current con-
ducted by the diode is:
( ) _{( ) IDIODE =}
V_IN − V_OUT + V_D
V_IN
I_LOAD
Remember to keep lead lengths short and observe proper
grounding (see Board Layout Checklist) to avoid ringing
and increased dissipation.
The forward voltage drop allowable in the diode is calcu-
lated from the maximum short-circuit current as:
V_F
≈
P_D
I_SC(PK)
where P_D is the allowable power dissipation and will be
determined by efficiency and/or thermal requirements
(see Efficiency Considerations).
C_IN and C_OUT Selection
In continuous mode, the source current of the P-channel
MOSFET is a square wave of duty cycle V_OUT/ V_IN. To
prevent large voltage transients, a low effective series
resistance (ESR) input capacitor sized for the maximum
RMS current must be used. The maximum RMS capacitor
current is given by:
[ ^{( )}]^1/2
V_OUT V_IN − V_OUT
C_IN Required I_RMS ≈ I_MAX
V_IN
This formula has a maximum at V_IN = 2V_OUT, where I_RMS
= I_OUT/2. This simple worst-case condition is commonly
used for design because even significant deviations do not
offer much relief. Note that capacitor manufacturer’s
ripple current ratings are often based on only 2000 hours
of life. This makes it advisable to further derate the
capacitor, or to choose a capacitor rated at a higher
temperature than required. Several capacitors may also be
paralleled to meet size or height requirements in the
design. Always consult the manufacturer if there is any
question. An additional 0.1µF to 1µF ceramic capacitor is
also required on each V_IN line (Pins 5, 13) for high
frequency decoupling.
The selection of C_OUT is driven by the required (ESR). The
ESR of C_OUT must be less than twice the value of R_SENSE
for proper operation of the LTC1143 series:
C_OUT Required ESR < 2R_SENSE
Optimum efficiency is obtained by making the ESR equal
to R_SENSE. As the ESR is increased up to 2R_SENSE the
efficiency degrades by less than 1%. If the ESR is greater
than 2R_SENSE, the voltage ripple on the output capacitor
will prematurely trigger Burst Mode operation, resulting in
disruption of continuous mode and an efficiency hit which
can be several percent.
Manufacturers such as Nichicon and United Chemicon
should be considered for high performance capacitors.
The OS-CON semiconductor dielectric capacitor available
from Sanyo has the lowest ESR size/ratio of any aluminum
electrolytic at a somewhat higher price. Once the ESR
requirement for C_OUT has been met, the RMS current
rating generally far exceeds the I_RIPPLE(P-P) requirement.
In surface mount applications multiple capacitors may
have to be parallel to meet the capacitance, ESR or RMS
current handling requirements of the application.
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