LTC3621-2_15 Datasheet, PDF (7/18 Pages) Linear Technology – 17V, 1A Synchronous Step-Down Regulator with 3.5A Quiescent Current

LTC3621/LTC3621-2
Pin Functions (DFN/MSOP)
SW (Pin 1/Pin 1): Switch Node Connection to the Inductor
of the Step-Down Regulator.
V_IN (Pin 2/Pin 2): Input Voltage of the Step-Down Regulator.
RUN (Pin 3/Pin 3): Logic Controlled RUN Input. Do not
leave this pin floating. Logic high activates the step-down
regulator.
FB (Pin 4/Pin 5): Feedback Input to the Error Amplifier
of the Step-Down Regulator. Connect a resistor divider
tap to this pin. The output voltage can be adjusted from
0.6V to V_IN by:
V_OUT = 0.6V • [1 + (R2/R1)]
For Fixed V_OUT options, connect the FB pin directly to V_OUT.
PGOOD (Pin 4, MSOP Package Only): V_OUT within Regu-
lation Indicator.
INTV_CC (Pin 5/Pin 6): Low Dropout Regulator. Bypass with
at least 1µF to Ground.
MODE/SYNC (Pin 6/Pin 7): Burst Mode Select and External
Clock Synchronization of the Step-Down Regulator. Tie
MODE/SYNC to INTV_CC for Burst Mode operation with a
400mA peak current clamp, tie MODE/SYNC to GND for
pulse skipping operation, and tie MODE/SYNC to a volt-
age between 1V and V_INTVCC – 1.2V for forced continuous
mode. Furthermore, connecting MODE/SYNC to an external
clock will sync the system clock to the external clock and
put the part in forced continuous mode.
GND (Exposed Pad Pin 7/Pin 9): Ground Backplane for
Power and Signal Ground. Must be soldered to PCB ground.
SGND (Pin 8, MSOP Package Only): Signal Ground.
Block Diagram
0.8ms
SOFT-START
ERROR
+
AMPLIFIER
0.6V +
ITH
FB
–
FIXED V_OUT
MODE/SYNC
INTV_CC
RUN
CLK
OSCILLATOR
LDO
PGOOD
SLOPE
COMPENSATION
BURST
AMPLIFIER
+
MAIN
I-COMPARATOR
–
BUCK
LOGIC
AND
GATE DRIVE
OVERCURRENT
COMPARATOR
V_IN
V_IN – 5V
SW
INTV_CC
MS8E PACKAGE ONLY
REVERSE
COMPARATOR
For more information www.linear.com/LTC3621
GND
3621 BD
3621fc
7