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LTC3588-2_10 Datasheet, PDF (7/18 Pages) Linear Technology – Piezoelectric Energy Harvesting Power Supply with 14V Minimum VIN
LTC3588-2
Pin Functions
PZ1 (Pin 1): Input connection for piezoelectric element or
other AC source (used in conjunction with PZ2).
PZ2 (Pin 2): Input connection for piezoelectric element or
other AC source (used in conjunction with PZ1).
CAP (Pin 3): Internal rail referenced to VIN to serve as gate
drive for buck PMOS switch. A 1µF capacitor should be
connected between CAP and VIN. This pin is not intended
for use as an external system rail.
VIN (Pin 4): Rectified Input Voltage. A capacitor on this
pin serves as an energy reservoir and input supply for the
buck regulator. The VIN voltage is internally clamped to a
maximum of 20V (typical).
SW (Pin 5): Switch Pin for the Buck Switching Regulator.
A 22µH or larger inductor should be connected from SW
to VOUT.
VOUT (Pin 6): Sense pin used to monitor the output volt-
age and adjust it through internal feedback.
VIN2 (Pin 7): Internal low voltage rail to serve as gate drive
for buck NMOS switch. Also serves as a logic high rail for
output voltage select bits D0 and D1. A 4.7µF capacitor
should be connected from VIN2 to GND. This pin is not
intended for use as an external system rail.
D1 (Pin 8): Output Voltage Select Bit. D1 should be tied
high to VIN2 or low to GND to select desired VOUT (see
Table 1).
D0 (Pin 9): Output Voltage Select Bit. D0 should be tied
high to VIN2 or low to GND to select desired VOUT (see
Table 1).
PGOOD (Pin 10): Power good output is logic high when
VOUT is above 92% of the target value. The logic high is
referenced to the VOUT rail.
GND (Exposed Pad Pin 11): Ground. The Exposed Pad
should be connected to a continuous ground plane on the
second layer of the printed circuit board by several vias
directly under the LTC3588-2.
Block Diagram
VIN 4
PZ1 1
PZ2 2
8, 9
D1, D0
20V
2
INTERNAL RAIL
GENERATION
UVLO
BUCK
CONTROL
BANDGAP
REFERENCE
SLEEP
3 CAP
5 SW
7 VIN2
11 GND
PGOOD
COMPARATOR
6 VOUT
10 PGOOD
35882 BD
35882fa
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