LTC3564_15 Datasheet, PDF (7/20 Pages) Linear Technology – 2.25MHz, 1.25A Synchronous Step-Down Regulator

LTC3564
PI FU CTIO S _(S5/DCB)
V_FB (Pin 1/Pin 4) : Feedback Pin. Receives the feedback
voltage from an external resistive divider across the out-
put.
GND (Pin 2/NA): Ground Pin.
V_IN (Pin 3/Pin 3): Main Supply Pin. Must be closely
decoupled to GND, Pin 2, with a 10μF or greater ceramic
capacitor.
SW (Pin 4/Pin 1): Switch Node Connection to Inductor.
This pin connects to the drains of the internal main and
synchronous power MOSFET switches.
RUN (Pin 5/Pin 6): Run Control Input. Forcing this pin
above 1.5V enables the part. Forcing this pin below 0.3V
shuts down the device. In shutdown, all functions are
disabled drawing <1μA supply current. Do not leave RUN
floating.
PGND (NA/Pin 2): Main Power Ground Pin. Connect to the
(–) terminal of C_OUT, and (–) terminal of C_IN.
SGND (NA/Pins 5, 7): The Signal Ground Pin. All small
signal components and compensation components should
be connected to this ground (see Board Layout Consider-
ations.)
W
FU CTIO AL DIAGRA
SLOPE
COMP
OSC
OSC
FREQ
SHIFT
V_FB
+
0.6V
– ^EA
V_IN
RUN
0.6V REF
SHUTDOWN
0.65V
0.52V
–
SLEEP
+
BURST
SQ
RQ
RS LATCH
SWITCHING
LOGIC
AND
BLANKING
CIRCUIT
I_COMP
ANTI-
SHOOT-
THRU
I_RCMP
V_IN
R_SENSE
SW
GND
3564 FD
3564f
7