LTC1293DCSW Datasheet, PDF (7/28 Pages) Linear Technology – Single Chip 12-Bit Data Acquisition System

LTC1293/LTC1294/LTC1296
PI FU CTIO S
LTC1293
# PIN
1 – 6 CH0 – CH5
7
COM
8
DGND
9
V^–
10 AGND
11 V_REF
12 D_IN
13 D_OUT
14 CS
15 CLK
16 V_CC
FUNCTION
DESCRIPTION
Analog Inputs
Common
Digital Ground
Negative Supply
Analog Ground
Ref. Input
Data Input
Digital Data Output
Chip Select Input
Clock
Positive supply
The analog inputs must be free of noise with respect to AGND.
The common pin defines the zero reference point for all single ended inputs. It must be free of noise and is
usually tied to the analog ground plane.
This is the ground for the internal logic. Tie to the ground plane.
Tie V^– to most negative potential in the circuit (Ground in single supply applications).
AGND should be tied directly to the analog ground plane.
The reference inputs must be kept free of noise with respect to AGND.
The A/D configuration word is shifted into this input.
The A/D conversion result is shifted out of this output.
A logic low on this input enables data transfer.
This clock synchronizes the serial data transfer and controls A/D conversion rate.
This supply must be kept free of noise and ripple by bypassing directly to the analog ground plane.
LTC1294
# PIN
FUNCTION
DESCRIPTION
1 –8 CH0 – CH7
9
COM
10 DGND
11 V^–
12 AGND
13, 14 REF^–, REF⁺
15 D_IN
16 D_OUT
17 CS
18 CLK
19, 20 AV_CC, DV_CC
Analog Inputs
Common
Digital Ground
Negative Supply
Analog Ground
Ref. Inputs
Data Input
Digital Data Output
Chip Select Input
Clock
Positive Supplies
The analog inputs must be free of noise with respect to AGND.
The common pin defines the zero reference point for all single ended inputs. It must be free of noise and is
usually tied to the analog ground plane.
This is the ground for the internal logic. Tie to the ground plane.
Tie V^– to most negative potential in the circuit (Ground in single supply applications).
AGND should be tied directly to the analog ground plane.
The reference inputs must be kept free of noise with respect to AGND. The A/D sees a reference voltage equal
to the difference between REF⁺ and REF^–.
The A/D configuration word is shifted into this input.
The A/D conversion result is shifted out of this output.
A logic low on this input enables data transfer.
This clock synchronizes the serial data transfer and controls A/D converion rate.
These supplies must be kept free of noise and ripple by bypassing directly to the analog ground plane. AV_CC
and DV_CC must be tied together.
LTC1296
# PIN
FUNCTION
DESCRIPTION
1 –8 CH0 – CH7
9
COM
10 DGND
11 V^–
12 AGND
13, 14 REF^–, REF⁺
15 D_IN
16 D_OUT
17 CS
18 CLK
19 SSO
20 V_CC
Analog Inputs
Common
Digital Ground
Negative Supply
Analog Ground
Ref. Inputs
Data Input
Digital Data Output
Chip Select Input
Clock
System Shutdown
Output
Positive Supply
The analog inputs must be free of noise with respect to AGND.
The common pin defines the zero reference point for all single ended inputs. It must be free of noise and is
usually tied to the analog ground plane.
This is the ground for the internal logic. Tie to the ground plane.
Tie V^– to most negative potential in the circuit (Ground in single supply applications).
AGND should be tied directly to the analog ground plane.
The reference inputs must be kept free of noise with respect to AGND. The A/D sees a reference voltage equal
to the difference between REF⁺ and REF^–.
The A/D configuration word is shifted into this input.
The A/D conversion result is shifted out of this output.
A logic low on this input enables data transfer.
This clock synchronizes the serial data transfer and controls A/D conversion rate.
System Shutdown Output pin will go low when power shutdown is requested.
This supply must be kept free of noise and ripple by bypassing directly to the analog ground plane.
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