LTC3459_07 Datasheet, PDF (6/12 Pages) Linear Technology – 10V Micropower Synchronous Boost Converter

LTC3459
PIN FUNCTIONS (DC/DCB/S6 Packages)
V_IN (Pin 1/Pin 6/Pin 6): Input Supply Pin. Bypass V_IN with
a low ESR, ESL ceramic capacitor of at least 1μF.
V_OUT (Pin 2/Pin 2/Pin 5): Regulated Output Voltage of
the Boost Regulator. Bypass V_OUT with a low ESR, ESL
ceramic capacitor between 2.2μF and 10μF. V_OUT ripple
increases with smaller capacitors.
SHDN (Pin 3/Pin 1/Pin 4): Master Shutdown Input. Driving
SHDN low disables all IC functions and reduces quiescent
current from the battery to less than 1μA. This pin must
be pulled above 1V to enable the IC.
FB (Pin 4/Pin 3/Pin 3): Input to the Burst Mode Comparator.
An external resistor divider connected between V_OUT,
GND and this pin sets the output voltage to:
V_OUT = 1.22(1 + R1/R2)
GND (Pin 5/Pin 5/Pin 2): Signal and Power Ground. Provide
a short, direct PCB path between GND and the (–) side of
the filter capacitors on V_IN and V_OUT.
SW (Pin 6/Pin 4/Pin 1): Switch Pin. Connect a 15μH to
33μH inductor between SW and V_IN. Keep PCB trace lengths
as short and wide as possible to reduce EMI and voltage
overshoot. If the inductor current falls to zero, the internal
P-channel MOSFET synchronous rectifier is turned off to
prevent reverse charging of the inductor.
Exposed Pad (Pin 7/Pin 7, DC and DCB Packages Only):
Ground. The Exposed Pad must be soldered to PCB.
BLOCK DIAGRAM
V_OUT
QS
P/~N
QB RD
I_ZO S Q
RD QB
V_CC
t_OFF
TIMER
t_OFF
I_PEAK
Q SD
QB R
V_SELECT
THERMAL
SD
V_CC
I_PEAK
DETECT
SDB
P-DRIVE
N-DRIVE
SD
SW
V_SELECT
I_ZO
V_BEST ^SW1
I_ZERO
DETECT
SLEEP
DELAY
P-DRIVE
V_BEST
HYSTCOMP
N-DRIVE
V_CC
REFOK
REFERENCE
GND
OFF ON
SHDN
6
V_IN
V_OUT
R1
FB
R2
SD
SDB
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