LTC3417A-2_15 Datasheet, PDF (6/20 Pages) Linear Technology – Dual Synchronous 1.5A/1A 4MHz Step-Down DC/DC Regulator

LTC3417A-2
TYPICAL PERFORMANCE CHARACTERISTICS
R_DS(ON) vs V_IN OUT2
0.20
0.19
P-CHANNEL SWITCH
0.18
T_A = 27°C
Frequency vs V_IN
6
4
2 _{FREQ = 143k TO GROUND}
0
0.17
–2
0.16
0.15
N-CHANNEL SWITCH
0.14
2 2.5 3 3.5 4 4.5 5 5.5
V_IN (V)
3417A-2 G16
–4
FREQ = V_IN
–6
–8
–10
2 2.5 3 3.5 4 4.5 5 5.5
V_IN (V)
3417A-2 G17
Frequency vs Temperature
15
10
FREQ = V_IN
5
0
FREQ = 143k TO GROUND
–5
–10
–15
–50 –25
0 25 50 75
TEMPERATURE (°C)
100 125
3417A-2 G18
PIN FUNCTIONS (DFN/TSSOP)
RUN1 (Pin 1/Pin 2): Enable for 1.5A Regulator. When
at Logic 1, 1.5A regulator is running. When at 0V, 1.5A
regulator is off. When both RUN1 and RUN2 are at 0V, the
part is in shutdown.
V_IN1 (Pin 2/Pin 3): Supply Pin for P-Channel Switch of
1.5A Regulator.
I_TH1 (Pin 3/Pin 4): Error Amplifier Compensation Point
for 1.5A Regulator. The current comparator threshold
increases with this control voltage. Nominal voltage range
for this pin is 0V to 1.5V.
V_FB1 (Pin 4/Pin 5): Receives the feedback voltage from
external resistive divider across the 1.5A regulator output.
Nominal voltage for this pin is 0.8V.
V_FB2 (Pin 5/Pin 6): Receives the feedback voltage from
external resistive divider across the 1A regulator output.
Nominal voltage for this pin is 0.8V.
I_TH2 (Pin 6/Pin 7): Error Amplifier Compensation Point for
1A regulator. The current comparator threshold increases
with this control voltage. Nominal voltage range for this
pin is 0V to 1.5V.
RUN2 (Pin 7/Pin 8): Enable for 1A Regulator. When at
Logic 1, 1A regulator is running. When at 0V, 1A regula-
tor is off. When both RUN1 and RUN2 are at 0V, the part
is in shutdown.
V_IN2 (Pin 8/Pin 9): Supply Pin for P-Channel Switch of 1A
Regulator and Supply for Analog Circuitry.
6
SYNC/MODE (Pin 9/Pin 12): Combination Mode Selection
and Oscillator Synchronization Pin. This pin controls the op-
eration of the device. When the voltage on the SYNC/MODE
pin is >(V_IN – 0.5V), Burst Mode operation is selected.
When the voltage on the SYNC/MODE pin is < 0.5V, pulse
skipping mode is selected. When the SYNC/MODE pin is
held at V_IN/2, forced continuous mode is selected. The
oscillation frequency can be synchronized to an external
oscillator applied to this pin. When synchronized to an
external clock, pulse skip mode is selected.
SW2 (Pin 10/Pin 13): Switch Node Connection to the
Inductor for the 1A Regulator. This pin swings from V_IN2
to PGND2.
PGOOD (Pin 11/Pin 14): Power Good Pin. This common
drain-logic output is pulled to GND when the output volt-
age of either regulator is –6% below regulation. If either
RUN1 or RUN2 is low (the respective regulator is in sleep
mode and therefore the output voltage is low), then PGOOD
reflects the regulation of the running regulator.
FREQ (Pin 12/Pin 15): Frequency Set Pin. When FREQ is
at V_IN, internal oscillator runs at 1.5MHz. When a resistor
is connected from this pin to ground, the internal oscillator
frequency can be varied from 0.6MHz to 4MHz.
GNDA (Pin 13/Pin 16): Analog Ground Pin for Internal
Analog Circuitry.
PHASE (Pin 14/Pin 17): Selects 1A regulator switching
phase with respect to 1.5A regulator switching. Set to
3417a2fa