LT1036_03 Datasheet, PDF (6/12 Pages) Linear Technology – Logic Controlled Regulator

LT1036
APPLICATIO S I FOR ATIO
The basic shutdown control circuit uses a direct gate drive
or an open collector driver and a pull-up resistor which are
tied to V_AUX, as shown in Figure 2.
V_IN
+
5
1
IN
OUT
+
LT1036
1µF ^{2 EN}
4
GND ^AUX ₊
3
2µF
V_O 12V
2µF
5V
7.5-20V
Figure 1
LT1036M/1036C • AI01
IN
OUT
LT1036
EN _GND AUX
5V
V_AUX
0mA–75mA
LOAD
12V
0A-3A
LOAD
Figure 2
LT1036M/1036C • AI02
Driving the Enable Pin
The enable pin equivalent schematic is shown in Figure 3.
Basically, enable pin current is zero above the threshold
and about 1.5µA below the threshold, flowing out of the
pin. Standard logic, such as TTL and CMOS, will interface
directly to the enable pin, even if the logic output swing is
higher than the input voltage (V_IN) to the regulator.
15V CMOS can be used to drive the enable pin, even if
the regulator is not powered up, without loading the
CMOS output.
Timing functions, such as delayed power-up or
power-down can be implemented with an RC network.
The current flowing out of the enable pin should not
70µA
1V
ENABLE
6
LT1036M/1036C • AI03
Figure 3
be used as the timing current in delayed power-up
applications as it is temperature sensitive and varies
somewhat from device to device. Instead, a resistor tied to
the auxiliary output, the input, or to a logic signal should
be used. The timing resistor chosen should provide at
least 25µA of current to “swamp out” the effects of the
internal current.
Main Output Current Voltage Characteristics
Following a high to low transition at the enable pin, the
main regulator output will begin to drop after a delay of
approximately 0.4µs. With no capacitive load, the output
will fall to zero in approximately 0.8µs (R_L = 4Ω to 100Ω).
With a capacitive load, fall time is limited by the RC product
of the load and the output capacitance. For light loads
(R_L>400Ω), the discharge time is controlled by an
internal current pull-down of 15mA for output voltages
down to 1.5V. Below 1.5V, the pull-down current drops to
≈ 4mA. The DC output voltage in the shutdown mode is
approximately 0.12V due to an internal current path in the
regulator. (See Figure 4.)
The user should note that the output in the low state can
only sink about 3mA. If current is forced into the output,
the output voltage will rise to 1V at 5mA and about 1.5V at
10mA. With no output capacitor, the rise time of the main
output is about 12µs. With an output capacitor, rise time
is limited by the short circuit current of the LT1036 and the
load capacitance. A 10µF output capacitor slows the
output rise time to approximately 80µs.
10
9 ^{VIN = 15V}
8
7
6
5
4 ^TJ ^{= 25°C}
3
T_J = –55°C
2
1
T_J = 150°C
0
0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6
OUTPUT VOLTAGE (V)
LT1036M/1036C • AI04
Figure 4
1036fa