LTC3413IFE Datasheet, PDF (5/16 Pages) Linear Technology – Monolithic Synchronous Regulator

TYPICAL PERFORMANCE CHARACTERISTICS
Load Step Transient
OUTPUT
VOLTAGE
100mV/DIV
INDUCTOR
CURRENT
1A/DIV
V_IN = 2.5V
20μs/DIV
V_OUT = 1.25V
LOAD STEP = 0A TO –3A
3413 G12
Start-Up
OUTPUT
VOLTAGE
500mV/DIV
INDUCTOR
CURRENT
1A/DIV
V_IN = 2.5V
V_OUT = 1.25V
LOAD = 0.4Ω
1ms/DIV
LTC3413
3413 G13
PIN FUNCTIONS
SV_IN (Pin 1): Signal Input Supply. Decouple this pin to
SGND with a capacitor. SV_IN must be greater or equal to
PV_IN, however, the difference between SV_IN and PV_IN must
be less than 0.5V.
PGOOD (Pin 2): Power Good Output. Open-drain logic
output that is pulled to ground when the output voltage
is not within ±10% of regulation point.
I_TH (Pin 3): Error Amplifier Compensation Point. The
current comparator threshold increases with this control
voltage. Nominal voltage range for this pin is from 0.2V
to 1.4V with 0.6V corresponding to the zero-sense voltage
(zero current).
V_FB (Pin 4): Feedback Pin. Receives the feedback voltage
from the output.
R_T (Pin 5): Oscillator Resistor Input. Connecting a resistor
to ground from this pin sets the switching frequency.
V_REF (Pin 6): Reference Voltage Input. The positive input
of the internal error amplifier senses one-half of the volt-
age at this pin through a resistor divider.
RUN/SS (Pin 7): Run Control and Soft-Start Input. Forcing
this pin below 0.5V shuts down the LTC3413. In shutdown
all functions are disabled drawing < 1μA of supply current.
A capacitor to ground from this pin sets the ramp time to
full output current.
SGND (Pin 8): Signal Ground. All small-signal components
and compensation components should connect to this
ground, which in turn connects to PGND at one point.
PV_IN (Pins 9, 16): Power Input Supply. Decouple this pin
to PGND with a capacitor.
SW (Pins 10, 11, 14, 15): Switch Node Connection to
Inductor. This pin connects to the drains of the internal
main and synchronous power MOSFET switches.
PGND (Pins 12, 13): Power Ground. Connect this pin
closely to the (–) terminal of C_IN and C_OUT.
Exposed Pad (Pin 17): Should be connected to PCB
ground.
3413fc
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