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| LTC3413IFE Datasheet, PDF (12/16 Pages) Linear Technology – Monolithic Synchronous Regulator | |||
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LTC3413
APPLICATIONS INFORMATION
VIN
2.5V
PGOOD
RPG
100k
RITH
5.11k
CITH CC
2200pF 100pF
X7R
ROSC
309k
RSS
4.7M
CSS
330pF X7R
1
SVIN
PVIN
2
PGOOD
SW
3
ITH
SWVFB
4
VFB
PGND
LTC3413
5
RT
PGND
6
VREF
SW
7
RUN/SS
SW
8
SGND
PVIN
*VISHAY DALE IHLP-2525CZ-01 0.47μH
**TDK C4532X5R0J107M
16
CIN1**
15
100μF
14
13
L1*
0.47μH
12
VOUT
1.25V
±3A
11
COUT**
100μF
s2
10
9
CIN2**
100μF
GND
3413 F03
Figure 3. One-Half VREF, ±3A DDR Memory Termination Supply at 1MHz
(Efï¬ciency Curve is Shown in Figure 1b)
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the LTC3413. Check the following in your layout.
1. A ground plane is recommended. If a ground plane
layer is not used, the signal and power grounds should
be segregated with all small-signal components returning
to the SGND pin at one point which is then connected to
the PGND pin close to the LTC3413.
2. Connect the (+) terminal of the input capacitor(s), CIN, as
close as possible to the PVIN pin. This capacitor provides
the AC current into the internal power MOSFETs.
3. Keep the switching node, SW, away from all sensitive
small-signal nodes.
4. Flood all unused areas on all layers with copper. Flood-
ing with copper will reduce the temperature rise of power
components. You can connect the copper areas to any DC
net (PVIN, SVIN, VOUT, PGND, SGND or any other DC rail
in your system).
5. Connect the VFB pin directly to the VOUT pin.
3413fc
12
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