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LTC1384IG Datasheet, PDF (5/8 Pages) Linear Technology – 5V Low Power RS232 Transceiver with 2 Receivers Active in Shutdown
LTC1384
PI FU CTIO S
VCC: 5V Input Supply Pin. This pin should be decoupled
with a 0.1µF ceramic capacitor.
GND: Ground Pin.
ON/OFF: TTL/CMOS Compatible Shutdown Pin. A logic
low puts the device in the Shutdown mode independent of
the RX EN pin. The supply current of the device drops to
35µA (two receivers alive) and both driver outputs are
forced into three-state.
RX EN: TTL/CMOS Compatible Receiver Enable Pin. A
logic high forces the receiver outputs into three-state. A
logic low enables the receiver outputs.
V+: Positive Supply Output (RS232 Drivers). V+ ≅ 2VCC –
2V. This pin requires an external capacitor C = 0.1µF for
charge storage. The capacitor may be tied to ground or
VCC. With multiple devices, the V + and V – pins may share
a common capacitor. For large numbers of devices, in-
creasing the size of the shared common storage capaci-
tors is recommended to reduce ripple.
V–: Negative Supply Output (RS232 Drivers). V – ≅ – (2VCC
– 2V). This pin requires an external capacitor C = 0.1µF for
charge storage.
C1+, C1–, C2+, C2 –: Commutating Capacitor Inputs. These
pins require two external capacitors C = 0.1µF: one from
C1+ to C1– and another from C2+ to C2 –. To maintain
charge pump efficiency, the capacitor’s effective series
resistance should be less than 2Ω.
TR IN: RS232 Driver Input Pins. Inputs are TTL/CMOS
compatible. The inputs of unused drivers can be left
unconnected since 300k input pull-up resistors to VCC are
included on chip. To minimize power consumption, the
internal driver pull-up resistors are disconnected from VCC
in the Shutdown mode.
TR OUT: Driver Outputs at RS232 Voltage Levels. Outputs
are in a high impedance state when in the Shutdown or VCC
= 0V. The driver outputs are protected against ESD to
±10kV for human body model discharges.
RX IN: Receiver Inputs. These pins can be forced to ±25V
without damage. The receiver inputs are protected against
ESD to ±10kV for human body model discharges. Each
receiver provides 0.4V of hysteresis for noise immunity.
RX OUT: Receiver Outputs with TTL/CMOS Voltage Lev-
els. A logic high at RX EN puts the outputs into three-state.
UW
W
SWITCHI G TI E WAVEFOR S
DRIVER
INPUT
1.4V
DRIVER
OUTPUT
0V
tLHD
1.4V
tHLD
VCC
0V
V+
0V
V–
LTC1384 • F01
RX
1.7V
INPUT
RX
OUTPUT
0.8V
tLHR
VCC
1.3V
0V
tHLR
2.4V VCC
0V
LTC1384 • F02
Figure 1. Driver Propagation Delay Timing
Figure 2. Receiver Propagation Delay Timing
1384fa
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