LTC1740_15 Datasheet, PDF (4/16 Pages) Linear Technology – 14-Bit, 6Msps, Sampling ADC

LTC1740
DIGITAL I PUTS A D DIGITAL OUTPUTS The q denotes specifications which apply over the full
operating temperature range, otherwise specifications are at T_A = 25°C. Specifications are guaranteed for both dual supply and single
supply operation. (Note 4)
SYMBOL PARAMETER
V_IH
High Level Input Voltage
V_IL
Low Level Input Voltage
I_IN
Digital Input Current
C_IN
Digital Input Capacitance
V_OH
High Level Output Voltage
V_OL
Low Level Output Voltage
I_SOURCE
I_SINK
Output Source Current
Output Sink Current
CONDITIONS
V_DD = 5.25V, V_SS = 0V
V_DD = 5.25V, V_SS = – 5V
V_DD = 4.75V, V_SS = 0V
V_DD = 4.75V, V_SS = – 5V
V_IN = 0V to V_DD
0V_DD = 4.75V, I_O = –10µA
0V_DD = 4.75V, I_O = –200µA
0V_DD = 2.7V, I_O = –10µA
0V_DD = 2.7V, I_O = –200µA
0V_DD = 4.75V, I_O = 160µA
0V_DD = 4.75V, I_O = 1.6mA
0V_DD = 2.7V, I_O = 160µA
0V_DD = 2.7V, I_O = 1.6mA
V_OUT = 0V, 0V_DD = 5V
V_OUT = V_DD, 0V_DD = 5V
MIN TYP MAX UNITS
q 2.4
V
q 2.4
V
q
0.8
V
q
0.8
V
q
±10
µA
1.8
pF
4.74
V
q 4.0
4.71
V
2.6
V
q 2.3
V
0.05
V
q
0.10
0.4
V
0.05
V
q
0.10
0.4
V
50
mA
35
mA
POWER REQUIRE E TS _{The q denotes specifications which apply over the full operating temperature range,}
otherwise specifications are at T_A = 25°C. Specifications are guaranteed for both dual supply and single supply operation. (Note 4)
SYMBOL PARAMETER
CONDITIONS
MIN TYP MAX UNITS
V_DD
OV_DD
V_SS
Positive Supply Voltage
Output Supply Voltage
Negative Supply Voltage
(Note 9)
(Note 9)
Dual Supply Mode
Single Supply Mode
4.75
5.25
V
2.7
V_DD
V
– 5.25
– 4.75
V
0
V
I_DD
Positive Supply Current
I_SS
Negative Supply Current
P_D
Power Dissipation
q
47
60
mA
q
2.3
2.6
mA
q
245 300
mW
WU
TI I G CHARACTERISTICS The q denotes specifications which apply over the full operating temperature
range, otherwise specifications are at T_A = 25°C. Specifications are guaranteed for both dual supply and single supply operation.
(Note 4)
SYMBOL
f_SAMPLE
t_CONV
t_ACQ
t_H
t_L
t_AP
t₁
t₂
PARAMETER
Sampling Frequency
Conversion Time
Acquisition Time
CLK High Time
CLK Low Time
Aperature Delay of Sample-and-Hold
CLK↑ to BUSY↓
BUSY↑ to Outputs Valid
Data Latency
CONDITIONS
(Note 9)
(Note 9)
(Note 9)
MIN TYP MAX UNITS
q 0.05
6
MHz
q
100 135
ns
q 31
67
ns
q 20
83.3
ns
q 20
83.3
ns
– 900
ps
3.5
ns
1.5
ns
3
Cycles
1740f
4