LTC4020_15 Datasheet, PDF (32/42 Pages) Linear Technology – 55V Buck-Boost Multi-Chemistry Battery Charger

LTC4020
APPLICATIONS INFORMATION
Current Sense Regulation Loop (CSN, CSP):
Instant-On/Ideal Diode Regulation Loop (BGATE):
The charger current regulation loop monitors and regu-
lates battery charge current. Ripple voltage on the DC/DC
converter output, however, gets directly imposed across
the charger sense resistor, and can produce significant
ripple currents. Large ripple currents can corrupt low level
current sensing, and can also cause unstable operation.
This ripple current effect can be greatly reduced by adding
a capacitor (C_CS) across the C_SN and CSP pins, producing
a low frequency pole with the two 100Ω resistors that are
required for those pins. The filter frequency is typically set
to reduce voltage ripple across the current sense inputs
at the CSP and CSN pins to less than 1mV_PP.
The ripple-reduction filter on the current sense inputs cre-
ates a phase shift in the charger current loop response,
which can result in instability. A resistor (R_CS) in series
with C_CS creates a zero that can be employed to recover
phase margin. This zero setting resistor will reintroduce
ripple error, so R_CS should be minimized. CSOUT can be
coupled into ITH for a similar feedforward zero with R_CS = 0.
Current sense information, or differential voltage at the CSN
to CSP pins, is amplified by a factor of 20 then output on
pin CSOUT. This signal is compared to a reference voltage
that is proportional to the maximum charge current at the
input of a transconductance amplifier, which creates an
error current that modulates the ITH compensation pin.
A feedforward zero can be employed to recover phase
margin by putting a capacitor from the CSOUT pin to the
ITH pin (C_CSOUT). The output impedance of the CSOUT
pin is ~100kΩ, so if compensation requirements are ap-
propriate, the C_CSOUT capacitor can perform double-duty
as both the primary pole ITH capacitor along with a 100kΩ
zero-setting resistance, and as feed forward coupling from
CSOUT to ITH.
CSP
LTC4020
CSN
100Ω
C_CS
R_CS
100Ω
R_SENSE
V_{BAT 4020 F19}
The instant-on function regulates the voltage across the
PowerPath FET by servoing the voltage at the BGATE pin.
Gate capacitance of the PowerPath FET is typically suf-
ficient to stabilize this loop. Additional capacitance can be
added to the BGATE pin (C_BGATE) to stabilize the current
foldback loop during instant-on operation if necessary:
R_CS
100Ω
CSN
LTC4020
C_BGATE
BGATE
BAT
V_{BAT 4020 F20}
Figure 20. Instant-On/Ideal Diode Compensation
Layout Considerations
The LTC4020 is typically used in designs that involve
substantial switching transients. The switch drivers on the
IC are designed to drive large capacitances and, as such,
generate significant transient currents themselves. Supply
bypass capacitor locations must be carefully considered
to avoid corrupting the signal ground reference (SGND)
used by the IC. Typically, high current paths and transients
from the input supply and any local drive supplies must
be kept isolated from SGND, to which sensitive circuits
such as the error amp reference and the current sense
circuits are referred.
Effective grounding can be achieved by considering switch
current in the ground plane, and the return current paths of
each respective bypass capacitor. The V_IN bypass return,
INTV_CC bypass return, and the sources of the ground-
referred switch FETs carry PGND currents. SGND originates
at the negative terminal of the V_OUT bypass capacitor, and
is the small signal reference for the LTC4020.
Do not be tempted to run small traces to separate ground
paths. A good ground plane is important as always, but
PGND referred bypass elements must be oriented such
that transient currents in these return paths do not corrupt
the SGND reference.
Figure 19. CSN/CSP Ripple Suppression
4020fb
32
For more information www.linear.com/LTC4020