LTC3586_15 Datasheet, PDF (30/36 Pages) Linear Technology – High Efficiency USB Power Manager with Boost, Buck-Boost and Dual Bucks

LTC3586/LTC3586-1
Applications Information
Table 7. Recommended Inductors for Buck-Boost Regulator
MAX MAX
INDUCTOR L I_DC DCR
TYPE
(µH) (A) (Ω)
SIZE IN mm
(L × W × H) MANUFACTURER
LPS4018 3.3 2.2 0.08 3.9 × 3.9 × 1.7 Coilcraft
2.2 2.5 0.07 3.9 × 3.9 × 1.7 www.coilcraft.com
D53LC
2.0 3.25 0.02 5.0 × 5.0 × 3.0 Toko
www.toko.com
7440430022 2.2 2.5 0.028 4.8 × 4.8 × 2.8 Würth-Elektronik
www.we-online.com
CDRH4D22/ 2.2 2.4 0.044 4.7 × 4.7 × 2.4 Sumida
HP
www.sumida.com
SD14
2.0 2.56 0.045 5.2 × 5.2 × Cooper
1.45
www.cooperet.com
Buck-Boost Regulator Input/Output Capacitor
Selection
Low ESR ceramic capacitors should be used at both the
buck-boost regulator output (V_OUT3) as well as the buck-
boost regulator input supply (V_IN3). Again, only X5R or
X7R ceramic capacitors should be used because they
retain their capacitance over wider voltage and temperature
ranges than other ceramic types. A 22µF output capacitor is
sufficient for most applications. The buck-boost regulator
input supply should be bypassed with a 2.2µF capacitor.
Refer to Table 6 for recommended ceramic capacitor
manufacturers.
Buck-Boost Regulator Output Voltage Programming
The buck-boost regulator can be programmed for output
voltages greater than 2.75V and less than 5.5V. The full
scale output voltage is programmed using a resistor divider
from the V_OUT3 pin connected to the FB3 pin such that:
V_OUT3
=
V_FB3


R1
R2
+
1^{}
where V_FB3 is 0.8V. See Figure 8 or 9.
Closing the Feedback Loop
The LTC3586/LTC3586-1 incorporate voltage mode PWM
control. The control to output gain varies with operation
region (buck, boost, buck-boost), but is usually no greater
than 20. The output filter exhibits a double pole response
given by:
f_{FILTER_POLE} = _{2 • π •}
1
L • C_OUT
Hz
where C_OUT is the output filter capacitor.
The output filter zero is given by:
f_{FILTER _ ZERO} =
1
2 • π • R_ESR • C_OUT
Hz
where R_ESR is the capacitor equivalent series resistance.
A troublesome feature in boost mode is the right-half plane
zero (RHP), and is given by:
f_RHPZ
=
2
•
π
V_IN2
• I_OUT • L
•
V_OUT
Hz
The loop gain is typically rolled off before the RHP zero
frequency.
A simple Type I compensation network (as shown in
Figure 8) can be incorporated to stabilize the loop but
at the cost of reduced bandwidth and slower transient
response. To ensure proper phase margin, the loop must
cross unity-gain decade before the LC double pole.
The unity-gain frequency of the error amplifier with the
Type I compensation is given by:
f_UG
=
2
•
π
•
1
R1•
CP1
Hz
Most applications demand an improved transient response
to allow a smaller output filter capacitor. To achieve a higher
bandwidth, Type III compensation is required. Two zeros
are required to compensate for the double-pole response.
Type III compensation also reduces any V_OUT3 overshoot
seen during a startup condition.
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