LTC3731H Datasheet, PDF (3/32 Pages) Linear Technology – 3-Phase, 600kHz, Synchronous Buck Switching Regulator Controller

LTC3731H
ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T_A = 25°C. V_CC = V_RUN/SS = 5V unless otherwise noted.
SYMBOL PARAMETER
CONDITIONS
MIN TYP MAX UNITS
I_FCB
V_BINHIBIT
UVR
UVADJ
FCB Bias Current
Burst Inhibit Threshold
Undervoltage RUN/SS Reset
Undervoltage Lockout Threshold
V_FCB = 0.65V
Measured at FCB Pin
V_CC Lowered Until the RUN/SS Pin is Pulled Low
0.2
0.7
µA
V_CC – 1.5 V_CC – 0.7 V_CC – 0.3
V
3.3 3.8
4.5
V
1.13 1.18 1.23
V
I_UVADJ
I_Q
Undervoltage Bias Current
Input DC Supply Current
Normal Mode
Shutdown
I_RUN/SS
V_RUN/SS
V_RUN/SSARM
Soft-Start Charge Current
RUN/SS Pin ON Threshold
RUN/SS Pin Arming Threshold
At UVADJ Threshold
(Note 4)
V_CC = 5V
V_RUN/SS = 0V
V_RUN/SS = 1.9V
V_RUN/SS, Ramping Positive
V_RUN/SS, Ramping Positive Until Short-Circuit
Latch-Off is Armed
0.2
50
nA
2.3
3.5
mA
50
100
µA
–0.8 –1.5 – 2.5
µA
1
1.5
1.9
V
3.8
4.5
V
V_RUN/SSLO
I_SCL
I_SDLHO
I_SENSE
RUN/SS Pin Latch-Off Threshold
RUN/SS Discharge Current
Shutdown Latch Disable Current
SENSE Pins Source Current
V_RUN/SS, Ramping Negative
Soft-Short Condition V_EAIN = 0.375V, V_RUN/SS = 4.5V
V_EAIN = 0.375V, V_RUN/SS = 4.5V
SENSE1⁺, SENSE1^–, SENSE2⁺, SENSE2^–, SENSE3⁺
SENSE3^– All Equal 1.2V; Current at Each Pin
3.2
V
–5 –1.5
µA
1.5
5
µA
13
20
µA
DF_MAX
TG t_R,t_F
BG t_R, t_F
TG/BG t_1D
Maximum Duty Factor
Top Gate Rise Time
Top Gate Fall Time
Bottom Gate Rise Time
Bottom Gate Fall Time
Top Gate Off to Bottom Gate On Delay
Synchronous Switch-On Delay Time
In Dropout, V_SENSEMAX ≤ 30mV
C_LOAD = 3300pF
C_LOAD = 3300pF
C_LOAD = 3300pF
C_LOAD = 3300pF
All Controllers, C_LOAD = 3300pF Each Driver
95 98.5
%
30
90
ns
40
90
ns
30
90
ns
20
90
ns
50
ns
BG/TG t_2D Bottom Gate Off to Top Gate On Delay All Controllers, C_LOAD = 3300pF Each Driver
Top Switch-On Delay Time
60
ns
t_ON(MIN)
Minimum On-Time
Power Good Output Indication
Tested with a Square Wave (Note 5)
110
ns
V_PGL
PGOOD Voltage Output Low
I_PGOOD
PGOOD Output Leakage
PGOOD Trip Thesholds
V_PGTHNEG
V_PGTHPOS
V_EAIN Ramping Negative
V_EAIN Ramping Positive
V_PGDLY
Power Good Fault Report Delay
Oscillator and Phase-Locked Loop
I_PGOOD = 2mA
V_PGOOD = 5V
V_EAIN with Respect to Set Output Voltage,
PGOOD Goes Low After V_UVDLY Delay
After V_EAIN is Forced Outside the PGOOD Thresholds
0.1
0.3
V
1
µA
–7 –10 –13
%
7
10
13
%
100 150
µs
f_NOM
Nominal Frequency
f_LOW
Lowest Frequency
f_HIGH
Highest Frequency
V_PLLFLTR = 1.2V
V_PLLFLTR = 0V
V_PLLFLTR = 2.4V
360 400 440
kHz
190 225 260
kHz
600 680 750
kHz
3731hf
3