LT1010_15 Datasheet, PDF (3/20 Pages) Linear Technology – Fast 150mA Power Buffer

LT1010
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T_A = 25°C. (See Note 4. Typical values in curves.)
SYMBOL PARAMETER
V_OS
Output Offset Voltage
I_B
Input Bias Current
CONDITIONS (Note 4)
(Note 4)
V_S = ±15V, V_IN = 0V
I_OUT = 0mA
I_OUT ≤ 150mA
MIN
TYP
MAX
UNITS
0
l –20
150
mV
220
mV
20
100
mV
0
0
l
0
250
µA
500
µA
800
µA
A_V
Large-Signal Voltage Gain
R_OUT
Output Resistance
I_OUT = ±1mA
I_OUT = ±150mA
l 0.995
5
5
l
1.00
V/V
10
Ω
10
Ω
12
Ω
V_SOS+
V_SOS–
Slew Rate
Positive Saturation Offset
Negative Saturation Offset
V_S = ±15V, V_IN = ±10V, V_OUT = ±8V, R_L = 100Ω
75
I_OUT = 0 (Note 5)
l
I_OUT = 0 (Note 5)
l
V/µs
1.0
V
1.1
V
0.2
V
0.3
V
R_SAT
Saturation Resistance
I_OUT = ±150mA (Note 5)
l
22
Ω
28
Ω
V_BIAS
Bias Terminal Voltage
R_BIAS = 20Ω (Note 6)
700
l 560
840
mV
880
mV
I_S
Supply Current
I_OUT = 0, I_BIAS = 0
9
mA
l
10
mA
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: Dissipation must be based on a thermal resistance. See
Application Information for power dissipation.
Note 3: In current limit or thermal limit, input current increases sharply
with input-output differentials greater than 8V; so input current must be
limited. Input current also rises rapidly for input voltages 8V above V⁺ or
0.5V below V^–.
Note 4: Specifications apply for 4.5V ≤ V_S ≤ 40V,
V^– + 0.5V ≤ V_IN ≤ V⁺ – 1.5V and I_OUT = 0, unless otherwise stated.
Temperature range is 0°C ≤ T_C ≤ 100°C.
Note 5: The output saturation characteristics are measured with 100mV
output clipping. See Applications Information for determining available
output swing and input drive requirements for a given load.
Note 6: The output stage quiescent current can be increased by connecting
a resistor between the BIAS pin and V⁺. The increase is equal to the bias
terminal voltage divided by this resistance.
Note 7: Thermal resistance varies depending upon the amount of PC board
metal attached to the pin (Pin 9) of the device. θ_JA is specified for a certain
amount of 1oz copper metal trace connecting to Pin 9 as described in the
thermal resistance tables in the Applications Information section.
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