LTC3554-2_15 Datasheet, PDF (29/36 Pages) Linear Technology – Micropower USB Power Manager with Li-Ion Charger and Two Step-Down Regulators

LTC3554/LTC3554-1/
LTC3554-2/LTC3554-3
OPERATION
Power-Up Via Asserting PWR_ON Pins
Figure 9 shows the LTC3554 powering up by driving
PWR_ON1 high. For this example the pushbutton circuitry
starts in the POFF or HR state with a battery connected
and all bucks disabled. Once PWR_ON1 goes high, the
pushbutton circuitry enters the PON state and buck1
powers up. Once buck1’s output is within 8% of its regu-
lation voltage for 230ms, PGOOD is asserted. Similarly,
if PWR_ON2 is brought high at a later time, buck2 will
power up. The pushbutton circuitry remains in the PON
state. During the time that buck2 powers up, PGOOD will
be held low. PGOOD will be asserted again once buck2 is
within 8% of its regulation for 230ms.
Powering up via PWR_ON is useful for applications
containing an always-on μC that’s not powered by the
LTC3554 regulators. That μC can power the application
up and down for housekeeping and other activities not
needing the user’s control.
Power-Down Via PWR_ON De-Assertion
Figure 10 shows the LTC3554 powering down by μC/μP
control. For this example the pushbutton circuitry starts
in the PON state with a battery connected and all bucks
enabled. The user presses the pushbutton (ON low) for at
least 50ms, which generates a debounced, low impedance
pulse on the PBSTAT output. After receiving the PBSTAT
signal, the μC/μP software decides to drive the PWR_ON
inputs low in order to power down. After the last PWR_ON
pin goes low, the pushbutton circuitry will enter the PDN2
state. In the PDN2 state a one second wait time is initi-
ated after which the pushbutton circuitry enters the POFF
state. During this one second time, the ON and PWR_ON
inputs as well as external power application are ignored
to allow all LTC3554 generated supplies to go low. Though
the above assumes a battery present, the same operation
would take place with a valid external supply (V_BUS) with
or without a battery present.
1
BAT
0
1
V_BUS
0
1
ON (PB)
0
1
PBSTAT
0
1
PWR_ON1
0
1
PWR_ON2
0
1
BUCK1
0
1
BUCK2
0
1
PGOOD
0
STATE
POFF/HR
230ms
PON
230ms
3554 TD03
Figure 9. Power-Up Via Asserting PWR_ON Pins
1
BAT
0
1
V_BUS
0
1
ON (PB)
0
1
PBSTAT
0
1
PWR_ON1
0
1
PWR_ON2
0
1s
50ms
µC/µP CONTROL
µC/µP CONTROL
1
BUCK1
0
1
BUCK2
0
1
PGOOD
0
STATE
PON
PDN2
POFF
3554 TD04
Figure 10. Power-Down Via PWR_ON De-Assertion
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