LTC3554-3_15 Datasheet, PDF (28/36 Pages) Linear Technology – Micropower USB Power Manager with Li-Ion Charger and Two Step-Down Regulators

LTC3554/LTC3554-1/
LTC3554-2/LTC3554-3
OPERATION
The PWR_ON inputs can be driven via a μP/μC or by one
of the buck outputs through a high impedance (100kΩ
typical) to keep the bucks enabled as described above.
PBSTAT does not go low on initial pushbutton applica-
tion for power-up, but will go low with subsequent ON
pushbutton applications in the PUP1, PUP2 or PON states.
Power-Up Via Applying External Power
Figure 8 shows the LTC3554 powering up through ap-
plication of external power (V_BUS). For this example the
pushbutton circuitry starts in the POFF or HR state with
a battery connected and both bucks disabled. 100ms
after V_BUS application the pushbutton circuitry transi-
tions into the PUP state and powers up buck1 followed
by buck2 (except LTC3554-3). In the LTC3554-3, buck1
and buck2 power up at the same time. The 100ms delay
time allows the applied supply to settle. The bucks will
stay powered as long as their respective PWR_ON inputs
are driven high before the 5 second PUP period is over.
If either PWR_ON is low or goes low after the 5 second
period the corresponding buck(s) will be shut down. In
the above example both PWR_ONs are high at the end of
the 5 second period and therefore both bucks continue
to stay on at the end of the 5 second period. PGOOD is
asserted once all enabled bucks are within 8% of their
regulation voltage for 230ms.
The PWR_ON inputs can be driven via a μP/μC or one of
the buck outputs through a high impedance (100kΩ typ)
to keep the bucks enabled as described above.
Without a battery present, initial power application causes
a power-on reset which puts the pushbutton circuitry in
the PDN1 state and subsequently the HR state one second
later. At this time, if a valid supply voltage is detected at the
BUS pin (i.e., V_BUS > V_UVLO and V_BUS – V_BAT > V_DUVLO),
the pushbutton circuity immediately enters the PUP1 state.
For this to work reliably, the BAT pin voltage must be kept
well-behaved when no battery is connected. Ensure this
by bypassing the BAT pin to GND with an RC network con-
sisting of a 100µF ceramic capacitor in series with 0.3Ω.
1
BAT
0
1
V_BUS
0
1
ON (PB)
0
1
PBSTAT
0
1
BUCK1
0
100ms
1
BUCK2*
0
1
230ms
PGOOD
0
5s
1
PWR_ON1
0
5s
1
PWR_ON2
0
STATE
POFF/HR
PUP2/PUP1
*BUCK1 AND BUCK2 FOR THE LTC3554-3
PON
3554 TD02
28
Figure 8. Power-Up Via Applying External Power
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