LTC3858 Datasheet, PDF (26/38 Pages) Linear Technology – Low IQ, Dual 2-Phase Synchronous Step-Down Controller

LTC3858
Applications Information
A second, more severe transient is caused by switching
in loads with large (>1µF) supply bypass capacitors. The
discharged bypass capacitors are effectively put in parallel
with C_OUT , causing a rapid drop in V_OUT . No regulator can
alter its delivery of current quickly enough to prevent this
sudden step change in output voltage if the load switch
resistance is low and it is driven quickly. If the ratio of
C_LOAD to C_OUT is greater than 1:50, the switch rise time
should be controlled so that the load rise time is limited
to approximately 25 • C_LOAD. Thus a 10µF capacitor would
require a 250µs rise time, limiting the charging current
to about 200mA.
Design Example
As a design example for one channel, assume V_IN =
12V(nominal), V_IN = 22V (max), V_OUT = 3.3V, I_MAX = 5A,
V_SENSE(MAX) = 75mV and f = 350kHz.
The inductance value is chosen first based on a 30% ripple
current assumption. The highest value of ripple current
occurs at the maximum input voltage. Tie the FREQ pin
to GND, generating 350kHz operation. The minimum
inductance for 30% ripple current is:
( )( ) ^{∆IL =}
V_OUT
fL


1–
V_OUT
V_IN


A 4.7µH inductor will produce 29% ripple current. The
peak inductor current will be the maximum DC value plus
one half the ripple current, or 5.73A. Increasing the ripple
current will also help ensure that the minimum on-time
of 95ns is not violated. The minimum on-time occurs at
maximum V_IN:
( ) ( ) ^tON(MIN)
=
V_OUT
V_IN f
= ^3.3V
22V 350kHz
= 429ns
The equivalent R_SENSE resistor value can be calculated by
using the minimum value for the maximum current sense
threshold (64mV):
R_SENSE
≤
64mV
5.73A
=
0.011Ω
Choosing 0.5% resistors: R_A = 24.9k and R_B = 77.7k yields
an output voltage of 3.296V.
The power dissipation on the topside MOSFET can be easily
estimated. Choosing a Fairchild FDS6982S dual MOSFET
results in: R_DS(ON) = 0.035Ω/0.022Ω, C_MILLER = 215pF. At
maximum input voltage with T(estimated) = 50°C:
( ) ( )( ) ^P_MAIN
=
3.3V
22V
5A ^{2 }1+
0.005
50°C – 25°C ^
(^0.035Ω)
+
(^22V
)²
5A
2
(^2.5Ω)(^215pF
)
•
( ) ^

5V
1
– 2.3V
+
1
2.3V


350kHz
= 331mW
A short-circuit to ground will result in a folded back cur-
rent of:
( ) _{ISC =}
32mV
0.015Ω
–
1^
2


95ns 22V
4.7µH



= 2.98A
with a typical value of R_DS(ON) and δ = (0.005/°C)(25°C)
= 0.125. The resulting power dissipated in the bottom
MOSFET is:
P_SYNC = ₍2.98A₎² ₍1.125₎₍0.022Ω₎ = 220mW
which is less than full-load conditions.
C_IN is chosen for an RMS current rating of at least 3A at
temperature assuming only this channel is on. C_OUT is
chosen with an ESR of 0.02Ω for low output ripple volt-
age. The output ripple in continuous mode will be highest
at the maximum input voltage. The output voltage ripple
due to ESR is approximately:
V_ORIPPLE = R_ESR (∆I_L) = 0.02Ω(1.45A) = 29mV_P-P
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