LTC3557 Datasheet, PDF (24/28 Pages) Linear Technology – USB Power Manager with Li-Ion Charger and Three Step-Down Regulators

LTC3557/LTC3557-1
APPLICATIONS INFORMATION
From the Vishay Curve 1 R-T characteristics, r_HOT is
0.2488 at 60°C. Using the above equation, R_NOM should
be set to 46.4k. With this value of R_NOM, the cold trip
point is about 16°C. Notice that the span is now 44°C
rather than the previous 40°C. This is due to the decrease
in “temperature gain” of the thermistor as absolute
temperature increases.
The upper and lower temperature trip points can be
independently programmed by using an additional bias
resistor as shown in Figure 9. The following formulas can
be used to compute the values of R_NOM and R1:
R_NOM
=
r_COLD – r_HOT
2.714
• R25
R1= 0.536 • R_NOM – r_HOT • R25
For example, to set the trip points to 0°C and 45°C with
a Vishay Curve 1 thermistor choose
R_NOM
=
3.266 – 0.4368
2.714
•
100k
=
104.2k
the nearest 1% value is 105k.
R1 = 0.536 • 105k – 0.4368 • 100k = 12.6k
the nearest 1% value is 12.7k. The final solution is shown
in Figure 9 and results in an upper trip point of 45°C and
a lower trip point of 0°C.
Battery Charger Stability Considerations
The LTC3557/LTC3557-1’s battery charger contains both a
constant voltage and a constant current control loop. The
constant voltage loop is stable without any compensation
when a battery is connected with low impedance leads.
Excessive lead length, however, may add enough series
inductance to require a bypass capacitor of at least 1μF from
BAT to GND. Furthermore, a 4.7μF capacitor in series with
a 0.2Ω to 1Ω resistor from BAT to GND is required to keep
ripple voltage low when the battery is disconnected.
High value, low ESR multilayer ceramic chip capacitors
reduce the constant voltage loop phase margin, possibly
resulting in instability. Ceramic capacitors up to 22μF may
be used in parallel with a battery, but larger ceramics should
be decoupled with 0.2Ω to 1Ω of series resistance.
In constant current mode, the PROG pin is in the feedback
loop rather than the battery voltage. Because of the
additional pole created by any PROG pin capacitance,
capacitance on this pin must be kept to a minimum. With
V_NTC
18
R_NOM
100k
NTC
19
R_NTC
100k
NTC BLOCK
0.765 • V_VNTC
–
+
–
0.349 • V_VNTC
+
TOO_COLD
TOO_HOT
+
0.017 • V_VNTC
–
NTC_ENABLE
35571 F08
Figure 8. Typical NTC Thermistor Circuit
24
V_NTC
18
R_NOM
105k
NTC
19
NTC BLOCK
0.765 • V_VNTC
–
+
TOO_COLD
R1
12.7k
R_NTC
100k
–
0.349 • V_VNTC
+
+
0.017 • V_VNTC
–
TOO_HOT
NTC_ENABLE
35571 F09
Figure 9. NTC Thermistor Circuit with Additional Bias Resistor
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