LTC3851A-1_15 Datasheet, PDF (23/30 Pages) Linear Technology – Synchronous Step-Down Switching Regulator Controller

LTC3851A-1
Applications Information
A second, more severe transient is caused by switching
in loads with large (>1μF) supply bypass capacitors. The
discharged bypass capacitors are effectively put in parallel
with C_OUT, causing a rapid drop in V_OUT. No regulator can
alter its delivery of current quickly enough to prevent this
sudden step change in output voltage if the load switch
resistance is low and it is driven quickly. If the ratio of
C_LOAD to C_OUT is greater than 1:50, the switch rise time
should be controlled so that the load rise time is limited
to approximately 25 • C_LOAD. Thus a 10μF capacitor would
require a 250μs rise time, limiting the charging current
to about 200mA.
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC3851A-1. These items are also illustrated graphically
in the layout diagram of Figure 9. Check the following in
your layout:
1. Are the board signal and power grounds segregated?
The LTC3851A-1 GND pin should tie to the ground plane
close to the input capacitor(s). The low current or signal
ground lines should make a single point tie directly to
the GND pin. The synchronous MOSFET source pins
should connect to the input capacitor(s) ground.
0.1mF
R_FREQ
1
16
MODE/PLLIN SW
2
15
FREQ/PLLFLTR TG
C_SS
R_C
C_C
47pF
3
RUN
14
BOOST
LTC3851A-1
4
TK/SS
13
V_IN
C_C2
5
I_TH
12
INTV_CC
6
V_FB
11
BG
1000pF
7 _SENSE–
10
GND
8 _SENSE+
9
PGOOD
M1
D_B
C_B
+
4.7µF
R_PGOOD
V_PULL-UP
L1
C_IN
+
D1
M2
R1
C_OUT
R2
R_SENSE
+
V_IN
–
–
V_OUT
+
3851A1 F09
Figure 9. LTC3851A-1 Layout Diagram
3851a1fa
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