LTC3616_15 Datasheet, PDF (23/28 Pages) Linear Technology – 6A, 4MHz Monolithic Synchronous Step-Down DC/DC Converter

LTC3616
Applications Information
Design Example
As a design example, consider using the LTC3616 in an
application with the following specifications:
V_IN = 2.25V to 5.5V, V_OUT = 1.8V, I_OUT(MAX) = 6A, I_OUT(MIN)
= 200mA, f = 2.6MHz.
Efficiency is important at both high and low load current,
so Burst Mode operation will be utilized.
First, calculate the timing resistor:
R_T
=
3.82¹¹Hz
2.6MHz
k
–
16k
=
130kΩ
Next, calculate the inductor value for about 30% ripple
current at maximum V_IN:
L
=
⎛
⎝⎜
1.8V
2.6MHz •
2A
⎞
⎠⎟
•
⎛⎝⎜_1–
1.8V
5.5V
⎞
⎠⎟
=
0.233µH
Using a standard value of 0.22µH inductor results in a
maximum ripple current of:
∆I_L
=
⎛
⎝⎜
1.8V ^⎞
2.6MHz • 0.22µH⎠⎟
•
⎛⎝⎜_1–
1.8V
5.5V
⎞
⎠⎟
=
2.12A
C_OUT will be selected based on the ESR that is required
to satisfy the output voltage ripple requirement and the
bulk capacitance needed for loop stability. For this design,
a 150µF (or 47µF plus 100µF) ceramic capacitor is used
with a X5R or X7R dielectric.
Assuming worst-case conditions of V_IN = 2V_OUT, C_IN should
be selected for a maximum current rating of:
I_RMS
=
6A
•
1.8V
3.6V
•
⎛
⎝⎜
3.6V
1.8V
–
1^{⎞⎠⎟}
=
3A_RMS
Decoupling PV_IN with four 22µF capacitors is adequate
for most applications.
If we set R2 = 196k, the value of R1 can now be determined
by solving the following equation.
R1
=
196k
•
⎛ 1.8V
⎝⎜ 0.6V
− 1^{⎞⎠⎟}
Finally, define the soft start-up time choosing the proper
value for the capacitor and the resistor connected to
TRACK/SS. If we set minimum t_SS = 5ms and a resistor
of 2MΩ, the following equation can be solved with the
maximum SV_IN = 5.5V :
C_SS
=
2MΩ
•
5ms
In^{⎛⎝⎜}
5.5V
5.5V – 0.6V
⎞
⎠⎟
=
21.6nF
The standard value of 22nF guarantees the minimum soft-
start up time of 5ms.
Figure 1 shows the schematic for this design example.
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the LTC3616:
1. A ground plane is recommended. If a ground plane layer
is not used, the signal and power grounds should be
segregated with all small-signal components returning
to the SGND pin at one point which is then connected
to the PGND pin close to the LTC3616.
2. Connect the (+) terminal of the input capacitor(s), C_IN,
as close as possible to the PV_IN pin, and the (–) terminal
as close as possible to the exposed pad, PGND. This
capacitor provides the AC current into the internal power
MOSFETs.
3. Keep the switching node, SW, away from all sensitive
small-signal nodes.
4. Flood all unused areas on all layers with copper. Flood-
ing with copper will reduce the temperature rise of
power components. Connect the copper areas to PGND
(exposed pad) for best performance.
5. Connect the V_FB pin directly to the feedback resistors.
The resistor divider must be connected between V_OUT
and SGND.
A value of 392k will be selected for R1.
For more information www.linear.com/LTC3616
3616fc
23