LTM9011-14_15 Datasheet, PDF (21/40 Pages) Linear Technology – 14-Bit, 125Msps/105Msps/ 80Msps Low Power Octal ADCs

FUNCTIONAL BLOCK DIAGRAM
V_DD = 1.8V
LTM9011-14/
LTM9010-14/LTM9009-14
OV_DD = 1.8V
CH 1
ANALOG
INPUT
CH 2
ANALOG
INPUT
CH 3
ANALOG
INPUT
CH 4
ANALOG
INPUT
CH 5
ANALOG
INPUT
CH 6
ANALOG
INPUT
CH 7
ANALOG
INPUT
CH 8
ANALOG
INPUT
ENC⁺
ENC^–
V_REF
14-BIT
S/H
ADC CORE
14-BIT
S/H
ADC CORE
14-BIT
S/H
ADC CORE
14-BIT
S/H
ADC CORE
14-BIT
S/H
ADC CORE
14-BIT
S/H
ADC CORE
14-BIT
S/H
ADC CORE
14-BIT
S/H
ADC CORE
DATA
SERIALIZER
OUT1A⁺
OUT1A^–
OUT1B⁺
OUT1B^–
OUT2A⁺
OUT2A^–
OUT2B⁺
OUT2B^–
OUT3A⁺
OUT3A^–
OUT3B⁺
OUT3B^–
OUT4A⁺
OUT4A^–
OUT4B⁺
OUT4B^–
OUT5A⁺
OUT5A^–
OUT5B⁺
OUT5B^–
OUT6A⁺
OUT6A^–
OUT6B⁺
OUT6B^–
OUT7A⁺
OUT7A^–
OUT7B⁺
OUT7B^–
OUT8A⁺
OUT8A^–
OUT8B⁺
OUT8B^–
PLL
1.25V
REFERENCE
RANGE
SELECT
REF
BUFFER
REFH
REFL
MODE
CONTROL
REGISTERS
V_DD/2
DIFF
REF
AMP
DCOA±
DCOB±
FRA±
FRB±
SDOA
SDOB
SDI
SCK
CSA
CSB
PAR/SER
SENSE
GND
VCM12 VCM34 VCM56 VCM78
9009101114 F01
Figure 1. Functional Block Diagram
9009101114fb
For more information www.linear.com/LTM9011-14
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