LTC2444 Datasheet, PDF (21/28 Pages) Linear Technology – 24-Bit High Speed 8-/16-Channel ADCs with Selectable Speed/Resolution

LTC2444/LTC2445/
LTC2448/LTC2449
APPLICATIO S I FOR ATIO
Internal Serial Clock, 2-Wire I/O,
Continuous Conversion
This timing mode uses a 2-wire, all output (SCK and SDO)
interface. The conversion result is shifted out of the device
by an internally generated serial clock (SCK) signal, see
Figure 9. CS may be permanently tied to ground, simplify-
ing the user interface or isolation barrier. The internal
serial clock mode is selected by tying EXT HIGH.
During the conversion, the SCK and the serial data output
pin (SDO) are HIGH (EOC = 1) and BUSY = 1. Once the
conversion is complete, SCK, BUSY and SDO go LOW
(EOC = 0) indicating the conversion has finished and the
device has entered the low power sleep state. The part
remains in the sleep state a minimum amount of time
(≈500ns) then immediately begins outputting data. The
data output cycle begins on the first rising edge of SCK and
ends after the 32nd rising edge. Data is shifted out the SDO
pin on each falling edge of SCK. The internally generated
serial clock is output to the SCK pin. This signal may be
used to shift the conversion result into external circuitry.
EOC can be latched on the first rising edge of SCK and the
last bit of the conversion result can be latched on the 32nd
rising edge of SCK. After the 32nd rising edge, SDO goes
HIGH (EOC = 1) indicating a new conversion is in progress.
SCK remains HIGH during the conversion.
2.7V TO 5.5V
1µF
28
V_CC
35
F_O
LTC2448
= EXTERNAL OSCILLATOR
= INTERNAL OSCILLATOR
REFERENCE ²⁹ _REF⁺
VOLTAGE
0.1V TO V_CC
30 _REF–
8
CH0
••• ₁₅
•••
CH7
ANALOG
INPUTS
16
CH8
••• ₂₃
•••
CH15
7
COM
34
SDI
SCK ³⁸
37
SDO
4-WIRE
SPI INTERFACE
CS ³⁶
2
BUSY
1,4,5,6,31,32,33
GND
CS
1
2
3
4
5
6
7
8
9
10 11 12 13 14
32
SCK
SDI DON'T CARE
SDO
1
0
EN SGL ODD A2 A1 A0 OSR3 OSR2 OSR1 OSR0 TWOX
BIT 31 BIT 30 BIT 29 BIT 28 BIT 27 BIT 26 BIT 25 BIT 24 BIT 23 BIT 22 BIT 21 BIT 20 BIT 19
EOC “0” SIG MSB
DON'T CARE
BIT 0
LSB
BUSY
CONVERSION
SLEEP
DATA OUTPUT
Figure 9. Internal Serial Clock, Continuous Operation
CONVERSION
2444 F10
sn2444589 2444589fs
21