LTM9012_15 Datasheet, PDF (20/28 Pages) Linear Technology – Quad 14-Bit, 125Msps ADC with Integrated Drivers

LTM9012
Applications Information
REGISTER A2: OUTPUT MODE REGISTER (ADDRESS 02h)
D7
D6
D5
ILVDS2
ILVDS1
ILVDS0
D4
TERMON
D3
OUTOFF
D2
OUTMODE2
D1
OUTMODE1
D0
OUTMODE0
Bits 7-5
Bit 4
Bit 3
Bits 2-0
ILVDS2:ILVDS0
LVDS Output Current Bits
000 = 3.5mA LVDS Output Driver Current
001 = 4.0mA LVDS Output Driver Current
010 = 4.5mA LVDS Output Driver Current
011 = Not Used
100 = 3.0mA LVDS Output Driver Current
101 = 2.5mA LVDS Output Driver Current
110 = 2.1mA LVDS Output Driver Current
111 = 1.75mA LVDS Output Driver Current
TERMON
LVDS Internal Termination Bit
0 = Internal Termination Off
1 = Internal Termination On. LVDS Output Driver Current is 2× the Current Set by ILVDS2:ILVDS0. Internal termination should only
be used with 1.75mA, 2.1mA or 2.5mA LVDS output current modes.
OUTOFF
Output Disable Bit
0 = Digital Outputs are Enabled.
1 = Digital Outputs are Disabled.
OUTMODE2:OUTMODE0
Digital Output Mode Control Bits
000 = 2-Lanes, 16-Bit Serialization
001 = 2-Lanes, 14-Bit Serialization
010 = 2-Lanes, 12-Bit Serialization
011 = Not Used
100 = Not Used
101 = 1-Lane, 14-Bit Serialization
110 = 1-Lane, 12-Bit Serialization
111 = 1-Lane, 16-Bit Serialization
REGISTER A3: TEST PATTERN MSB REGISTER (ADDRESS 03h)
D7
D6
D5
D4
D3
D2
D1
D0
OUTTEST
X
TP13
TP12
TP11
TP10
TP9
TP8
Bit 7
Bit 6
Bit 5-0
OUTTEST
0 = Digital Output Test Pattern Off
Digital Output Test Pattern Control Bit
1 = Digital Output Test Pattern On
Unused, Don’t Care Bit.
TP13:TP8
Test Pattern Data Bits (MSB)
TP13:TP8 Set the Test Pattern for Data Bit 13(MSB) Through Data Bit 8.
REGISTER A4: TEST PATTERN LSB REGISTER (ADDRESS 04h)
D7
D6
D5
D4
D3
D2
D1
TP7
TP6
TP5
TP4
TP3
TP2
TP1
Bit 7-0
TP7:TP0
Test Pattern Data Bits (LSB)
TP7:TP0 Set the Test Pattern for Data Bit 7 Through Data Bit 0(LSB).
20
D0
TP0
9012f