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LTC3769_15 Datasheet, PDF (19/32 Pages) Linear Technology – 60V Low IQ Synchronous Boost Controller
LTC3769
Applications Information
Setting Output Voltage
The LTC3769 output voltage is set by an external feedback
resistor divider carefully placed across the output, as shown
in Figure 3. The regulated output voltage is determined by:
VOUT
=
1.2V
⎛
⎝⎜
1+
RB
RA
⎞
⎠⎟
Great care should be taken to route the VFB line away
from noise sources, such as the inductor or the SW line.
Also place the feedback resistor divider close to the VFB
pin and keep the VFB node as small as possible to avoid
noise pickup.
LTC3769
VFB
VOUT
RB
RA
3769 F03
Figure 3. Setting Output Voltage
Soft-Start (SS Pin)
The start-up of VOUT is controlled by the voltage on the
SS pin. When the voltage on the SS pin is less than the
internal 1.2V reference, the LTC3769 regulates the VFB
pin voltage to the voltage on the SS pin instead of 1.2V.
Soft-start is enabled by simply connecting a capacitor from
the SS pin to ground, as shown in Figure 4. An internal
10μA current source charges the capacitor, providing a
linear ramping voltage at the SS pin. The LTC3769 will
regulate the VFB pin (and hence, VOUT) according to the
voltage on the SS pin, allowing VOUT to rise smoothly
from VIN to its final regulated value. The total soft-start
time will be approximately:
tSS
= CSS
•
1.2V
10µA
LTC3769
SS
CSS
GND
3769 F04
Figure 4. Using the SS Pin to Program Soft-Start
INTVCC Regulators
The LTC3769 features two separate internal P-channel
low dropout linear regulators (LDO) that supply power at
the INTVCC pin from either the VBIAS supply pin or the
EXTVCC pin depending on the connection of the EXTVCC
pin. INTVCC powers the gate drivers and much of the
LTC3769’s internal circuitry. The VBIAS LDO and the
EXTVCC LDO regulate INTVCC to 5.4V. Each of these can
supply at least 50mA and must be bypassed to ground with
a minimum of a 4.7μF ceramic capacitor. Good bypassing
is needed to supply the high transient currents required
by the MOSFET gate drivers and to prevent interaction
between the channels.
High input voltage applications in which large MOSFETs
are being driven at high frequencies may cause the maxi-
mum junction temperature rating for the LTC3769 to be
exceeded. The INTVCC current, which is dominated by the
gate charge current, may be supplied by either the VBIAS
LDO or the EXTVCC LDO. When the voltage on the EXTVCC
pin is less than 4.8V, the VBIAS LDO is enabled. In this
case, power dissipation for the IC is highest and is equal
to VBIAS • IINTVCC. The gate charge current is dependent
on operating frequency, as discussed in the Efficiency
Considerations section. The junction temperature can be
estimated by using the equations given in Note 3 of the
Electrical Characteristics. For example, at 70°C ambient
temperature, the LTC3769 INTVCC current is limited to less
than 19mA in the QFN package from a 60V VBIAS supply
when not using the EXTVCC supply:
TJ = 70°C + (19mA)(60V)(47°C/W) = 125°C
For more information www.linear.com/LTC3769
3769f
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