LTC3704_15 Datasheet, PDF(19/28 Page) Linear Technology – Wide Input Range, No RSENSE Positive-to-Negative DC/DC Controller

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LTC3704_15 Datasheet, PDF (19/28 Pages) Linear Technology – Wide Input Range, No RSENSE Positive-to-Negative DC/DC Controller

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LTC3704

APPLICATIO S I FOR ATIO

Aluminum electrolytic and dry tantalum capacitors are

both available in surface mount packages. In the case of

tantalum, it is critical that the capacitors have been surge

tested for use in switching power supplies. An excellent

choice is AVX TPS series of surface mount tantalum. Also,

ceramic capacitors are now available with extremely low

ESR, ESL and high ripple current ratings.

Input Capacitor Selection

The input voltage source impedance determines the size of

the input capacitor, which is typically in the range of 10Î¼F

to 100Î¼F. A low ESR capacitor is recommended, although

it is not as critical as for the output capacitor.

The RMS input capacitor ripple current for a positive-to-

negative converter is:

IRMS(CIN) =

â¢

VIN(MIN)

L1â¢ f

â¢ DMAX

Please note that the input capacitor can see a very high

surge current when a battery is suddenly connected to the

input of the converter and solid tantalum capacitors can

fail catastrophically under these conditions. Be sure to

specify surge-tested capacitors!

Burst Mode Operation and Considerations

The choice of MOSFET RDS(ON) and inductor value also

determines the load current at which the LTC3704 enters

Burst Mode operation. When bursting, the controller clamps

the peak inductor current to approximately:

IBURST(PEAK)

30mV

RDS(ON)

which represents about 20% of the maximum 150mV

SENSE pin voltage. The corresponding average current

depends upon the amount of ripple current. Lower induc-

tor values (higher ÎIL) will reduce the load current at which

Burst Mode operations begins, since it is the peak current

that is being clamped.

The output voltage ripple can increase during Burst Mode

operation if ÎIL is substantially less than IBURST. This can

occur if the input voltage is very low or if a very large

inductor is chosen. At high duty cycles, a skipped cycle

causes the inductor current to quickly decay to zero.

However, because ÎIL is small, it takes multiple cycles for

the current to ramp back up to IBURST(PEAK). During this

inductor charging interval, the output capacitor must

supply the load current and a significant droop in the

output voltage can occur. Generally, it is a good idea to

choose a value of inductor ÎIL between 20% and 40% of

IIN(MAX). The alternative is to either increase the value of

the output capacitor or disable Burst Mode operation

using the MODE/SYNC pin.

Burst Mode operation can be defeated by connecting the

MODE/SYNC pin to a high logic-level voltage (either with

a control input or by connecting this pin to INTVCC). In this

mode, the burst clamp is removed, and the chip can

operate at constant frequency from continuous conduc-

tion mode (CCM) at full load, down into deep discontinu-

ous conduction mode (DCM) at light load. Prior to skip-

ping pulses at very light load (i.e., < 5-10% of full load), the

controller will operate with a minimum switch on-time in

DCM. Pulse skipping prevents a loss of control of the

output at very light loads and reduces output voltage

ripple.

Checking Transient Response

The regulator loop response can be verified by looking at

the load transient response. Switching regulators gener-

ally take several cycles to respond to an instantaneous

step in resistive load current. When the load step occurs,

VO immediately shifts by an amount equal to (ÎILOAD)(ESR),

and then CO begins to charge or discharge (depending on

the direction of the load step) as shown in Figure 14. The

VOUT (AC)

100mV/DIV

IOUT (DC)

1A/DIV

0.5A

VIN = 5V

VOUT = â5V

250Î¼s/DIV

3704 F14

Figure 14. Load Step Response for the Circuit in Figure 1.

3704fb

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