LTC3630A Datasheet, PDF (19/24 Pages) Linear Technology – High Efficiency, 76V 500mA Synchronous Step-Down Converter

LTC3630A
Applications Information
4. Flood all unused area on all layers with copper except
for the area under the inductor. Flooding with copper
will reduce the temperature rise of power components.
You can connect the copper areas to any DC net (V_IN,
V_OUT, GND, or any other DC rail in your system).
Pin Clearance/Creepage Considerations
The LTC3630A is available in two packages (MSE16
and DHC) both with identical functionality. However, the
0.2mm (minimum space) between pins and paddle on the
DHCpackage may not provide sufficient PC board trace
clearance between high and low voltage pins in some
higher voltage applications. In applications where clear-
ance is required, the MSE16 package should be used. The
MSE16 package has removed pins between all the adjacent
high voltage and low voltage pins, providing 0.657mm
clearance which will be sufficient for most applications.
For more information, refer to the printed circuit board
design standards described in IPC-2221 (www.ipc.org).
L1
V_IN
V_IN
SW
V_OUT
R3
R1
RUN V_FB
R4 LTC3630A
I_SET
C_IN
R_ISET ^R2
C_ISET
C_OUT
C_SS
FBO
SS
V_PRG2
V_PRG1
GND
V_IN
5V TO 76V
C_IN
4.7µF
V_IN
SW
LTC3630A
RUN V_FB
I_SET
SS
FBO V_PRG1
V_PRG2
GND
3630a F13
L1
33µH
R_ISET
220k
C_IN: TDK C5750X7R2A-475M
C_OUT: 2 × AVX 1812D107MAT
L1: SUMIDA CDRH105RNP-330N
C_OUT
100µF
×2
V_OUT
5V
500mA
C_ISET
100pF
Figure 13. 5V to 76V Input to 5V Output,
High Efficiency, 500mA Regulator
L1
C_IN
V_IN
V_OUT
C_OUT
GND
VIAS TO GROUND PLANE
OUTLINE OF LOCAL GROUND PLANE
3630a F12
Figure 12. Example PCB Layout
For more information www.linear.com/LTC3630A
3630af
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