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LTC2654 Datasheet, PDF (19/24 Pages) Linear Technology – Quad 16-/12-Bit Rail-to-Rail DACs with 10ppm/°C Max Reference
LTC2654
OPERATION
Any channel or combination of DAC channels can be put
into power-down mode by using command 0100b in
combination with the appropriate DAC address, (n). The
integrated reference is automatically powered down when
external reference is selected using command 0111b. In
addition, all the DAC channels and the integrated refer-
ence together can be put into power-down mode using
Power-Down Chip command 0101b. For all power-down
commands the 16-bit data word is ignored, but still needs
to be clocked in.
Normal operation resumes by executing any command
which includes a DAC update, in software as shown in
Table 1 or by taking the asynchronous LDAC pin low.
The selected DAC is powered up as its voltage output is
updated. When a DAC which is in a powered-down state is
powered up and updated, normal settling is delayed. If less
than four DACs are in a powered-down state prior to the
update command, the power-up delay time is 12μs. If on
the other hand, all four DACs and the integrated reference
are powered down, then the main bias generation circuit
block has been automatically shut down in addition to the
individual DAC amplifiers and integrated reference. In this
case, the power up delay time is 14μs. The power-up of
integrated reference depends on the command that pow-
ered it down. If the reference is powered down using the
Select External Reference Command (0111b) then it can
only be powered back-up using Select Internal Reference
Command (0110b). However if the reference was powered
down using Power-Down Chip Command (0101b) then in
addition to Select Internal Reference Command (0110b),
any command that powers up the DACs will also power-up
the integrated reference.
Asynchronous DAC Update Using LDAC
In addition to the update commands shown in Table 1, the
LDAC pin asynchronously updates all the DAC registers
with the contents of the input registers.
If CS/LD is high, a low on the LDAC pin causes all the
DAC registers to be updated with the contents of the in-
put registers.
If CS/LD is low, a low going pulse on the LDAC pin before
the rising edge of CS/LD powers up all the DAC outputs but
does not cause the output to be updated. If LDAC remains
low after the rising edge of CS/LD, then LDAC is recognized,
the command specified in the 24-bit word just transferred
is executed and the DAC outputs are updated.
The DAC outputs are powered up when LDAC is taken
low, independent of the state of CS/LD. The integrated
reference is also powered up if it was powered down us-
ing Power-Down Chip (0101b) command. The integrated
reference will not power up when LDAC is taken low, if
it was powered down using Select External Reference
(0111b) Command.
If LDAC is low at the time CS/LD goes high, it inhibits any
software power-down command (Power-Down n, Power-
Down Chip, Select External Reference) that was specified
in the input word.
Reference Modes
For applications where an accurate external reference is
not available, the LTC2654 has a user-selectable, inte-
grated reference. The LTC2654-L has a 1.25V reference
that provides a full-scale output of 2.5V. The LTC2654-H
has a 2.048V reference that provides a full-scale output
of 4.096V. Both references exhibit a typical temperature
drift of 2ppm/°C. Internal reference mode can be selected
by using command 0110b, and is the power-on default.
A buffer is needed if the internal reference is required to
drive external circuitry. For reference stability and low
noise, connect a 0.1μF capacitor between REFCOMP and
GND. In this configuration, the internal reference can drive
up to 0.1μF capacitive load without any stability problems.
In order to ensure stable operation, the capacitive load on
REFIN/OUT pin should not exceed the capacitive load on
the REFCOMP pin.
The DAC can also operate in external reference mode using
command 0111b. In this mode, REFIN/OUT pin acts as an
input that sets the DAC’s reference voltage. The input is
high impedance and does not load the external reference
source. The acceptable voltage range at this pin is 0.5V ≤
REFIN/OUT ≤ VCC/2. The resulting full-scale output voltage
is 2•VREFIN/OUT. For using External Reference at start-up,
see the Power Supply Sequencing and Start-Up Section.
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