LTC2142-14_15 Datasheet, PDF (19/38 Pages) Linear Technology – 14-Bit, 65Msps/ 40Msps/25Msps Low Power Dual ADCs

LTC2142-14/
LTC2141-14/LTC2140-14
TIMING DIAGRAMS
CH 1
ANALOG
INPUT
CH 2
ANALOG
INPUT
ENC^–
ENC⁺
D1_0_1⁺
D1_0_1^–
D1_12_1^ttt3⁺
D1_12_13^–
D2_0_1⁺
D2_0_1^–
D2_12_1^ttt3⁺
D2_12_13^–
OF2_1⁺
OF2_1^–
CLKOUT⁺
CLKOUT ^–
Double Data Rate LVDS Output Mode Timing
All Outputs Are Differential and Have LVDS Levels
t_AP
A
t_AP
B
A+1
t_H
B+1
t_L
A+2
B+2
A+3
B+3
A+4
B+4
t_D
BIT 0
A-6
BIT 1 BIT 0
A-6
A-5
t_D
BIT 1
A-5
BIT 0
A-4
BIT 1
A-4
BIT 0
A-3
BIT 1
A-3
BIT 0
A-2
BIT 12 BIT 13 BIT 12 BIT 13 BIT 12 BIT 13 BIT 12 BIT 13 BIT 12
A-6
A-6
A-5
A-5
A-4
A-4
A-3
A-3
A-2
BIT 0
B-6
BIT 1 BIT 0
B-6
B-5
BIT 1
B-5
BIT 0
B-4
BIT 1
B-4
BIT 0
B-3
BIT 1
B-3
BIT 0
B-2
BIT 12 BIT 13 BIT 12 BIT 13 BIT 12 BIT 13 BIT 12 BIT 13 BIT 12
B-6
B-6
B-5
B-5
B-4
B-4
B-3
B-3
B-2
OF
OF
OF
OF
OF
OF
OF
OF
OF
B-6
A-6
B-5
A-5
B-4
A-4
B-3
A-3
B-2
t_C
t_C
21421014 TD03
SPI Port Timing (Readback Mode)
t_S
t_DS
t_DH
t_SCK
t_H
CS
SCK
t_DO
SDI
R/W
A6
A5
A4
A3
A2
A1
A0
XX
XX
XX
XX
XX
XX
XX
XX
SDO
HIGH IMPEDANCE
D7
D6
D5
D4
D3
D2
D1
D0
SPI Port Timing (Write Mode)
CS
SCK
SDI
R/W
A6
A5
A4
A3
A2
A1
A0
D7
D6
D5
D4
D3
D2
D1
D0
SDO
HIGH IMPEDANCE
21421014 TD04
21421014fa
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