LTC3862_15 Datasheet, PDF (18/42 Pages) Linear Technology – Multi-Phase Current Mode Step-Up DC/DC Controller

LTC3862
Operation
Table 1
PHASEMODE
SGND
Float
3V8
CH-1 to CH-2
PHASE
180°
180°
120°
CH-1 to CLKOUT
PHASE
APPLICATION
90°
2-Phase, 4-Phase
60°
6-Phase
240°
3-Phase
Using the LTC3862 Transconductance (g_m) Error
Amplifier in Multi-Phase Applications
The LTC3862 error amplifier is a transconductance, or g_m
amplifier, meaning that it has high DC gain but high output
impedance (the output of the error amplifier is a current
proportional to the differential input voltage). This style
of error amplifier greatly eases the task of implementing a
multi-phase solution, because the amplifiers from two or
more chips can be connected in parallel. In this case the
FB pins of multiple LTC3862s can be connected together,
as well as the ITH pins, as shown in Figure 8. The g_m of the
composite error amplifier is simply n times the transcon-
ductance of one amplifier, or g_m(TOT) = n • 660μS, where
n is the number of amplifiers connected in parallel. The
transfer function from the ITH pin to the current comparator
inputs was carefully designed to be accurate, both from
channel-to-channel and chip-to-chip. This way the peak
inductor current matching is kept accurate.
A buffered version of the output of the error amplifier
determines the threshold at the input of the current com-
parator. The ITH voltage that represents zero peak current
is 0.4V and the voltage that represents current limit is
1.2V (at low duty cycle). During an overload condition, the
output of the error amplifier is clamped to 2.6V at low duty
cycle, in order to reduce the latency when the overload
condition terminates. A patented circuit in the LTC3862 is
used to recover the slope compensation signal, so that the
maximum peak inductor current is not a strong function
of the duty cycle.
In multiphase applications that use more than one LTC3862
controller, it is possible for ground currents on the PCB
to disturb the control lines between the ICs, resulting in
erratic behavior. In these applications the FB pins should
be connected to each other through 100Ω resistors and
each slave FB pin should be decoupled locally with a 100pF
capacitor to ground, as shown in Figure 8.
V_OUT
ALL ITH PINS
CONNECTED
TOGETHER
100pF
100pF
MASTER
FREQ
INTV_CC
ITH
RUN
LTC3862
FB
SS
CLKOUT
SYNC
PLLFLTR PHASEMODE
SGND
100Ω
100Ω
SLAVE
FREQ
INTV_CC
ITH
RUN
LTC3862
FB
SS
CLKOUT
SYNC
PLLFLTR PHASEMODE
SGND
ON/OFF
CONTROL
INDIVIDUAL
INTV_CC PINS
LOCALLY
DECOUPLED
ALL RUN PINS
CONNNECTED
TOGETHER
ALL SS PINS
CONNNECTED
TOGETHER
ALL FB PINS
CONNECTED
TOGETHER
100pF
100pF
100Ω
100Ω
SLAVE
FREQ
INTV_CC
ITH
RUN
LTC3862
FB
SS
CLKOUT
SYNC
PLLFLTR PHASEMODE
SGND
3862 F08
Figure 8. LTC3862 Error Amplifier Configuration
for Multi-Phase Operation
Soft-Start
The start-up of the LTC3862 is controlled by the voltage on
the SS pin. An internal PNP transistor clamps the current
comparator sense threshold during soft-start, thereby
limiting the peak switch current. The base of the PNP is
connected to the SS pin and the emitter to an internal,
buffered ITH node (please note that the ITH pin voltage may
not track the soft-start voltage during this time period).
An internal 5μA current source charges the SS capacitor,
and clamps the peak sense threshold until the voltage on
the soft-start capacitor reaches approximately 0.6V. The
required amount of soft-start capacitance can be estimated
using the following equation:
C_SS
=
5µA


t_SS
0.6V


3862fc
18
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