LTC3633 Datasheet, PDF (18/28 Pages) Linear Technology – Dual Channel 3A, 15V Monolithic Synchronous Step-Down Regulator

LTC3633
APPLICATIONS INFORMATION
The ratio of this divider should be the same as that of the
slave channel’s feedback divider shown in Figure 5a. In
this tracking mode, V_OUT1 must be set higher than V_OUT2.
To implement the ratiometric tracking, the feedback pin of
the master channel should connect to the TRACKSS pin of
the slave channel (as in Figure 5b). By selecting different
resistors, the LTC3633 can achieve different modes of
tracking including the two in Figure 4.
Upon start-up, the regulator defaults to Burst Mode opera-
tion until the output exceeds 80% of its final value (V_FB >
0.48V). Once the output reaches this voltage, the operating
mode of the regulator switches to the mode selected by
the MODE/SYNC pin as described above. During normal
operation, if the output drops below 10% of its final value
(as it may when tracking down, for instance), the regula-
tor will automatically switch to Burst Mode operation to
prevent inductor saturation and improve TRACKSS pin
accuracy.
Output Power Good
The PGOOD output of the LTC3633 is driven by a 15Ω
(typical) open-drain pull-down device. This device will be
turned off once the output voltage is within 5% (typical) of
the target regulation point, allowing the voltage at PGOOD
to rise via an external pull-up resistor. If the output voltage
exits an 8% (typical) regulation window around the target
regulation point, the open-drain output will pull down with
15Ω output resistance to ground, thus dropping the PGOOD
pin voltage. This behavior is described in Figure 6.
PGOOD
VOLTAGE
NOMINAL OUTPUT
–8% –5% 0% 5% 8% OUTPUT VOLTAGE
3633 F06
Figure 6. PGOOD Pin Behavior
A filter time of 40μs (typical) acts to prevent unwanted
PGOOD output changes during V_OUT transient events.
As a result, the output voltage must be within the target
regulation window of 5% for 40μs before the PGOOD pin
pulls high. Conversely, the output voltage must exit the
8% regulation window for 40μs before the PGOOD pin
pulls to ground.
Efficiency Considerations
The percent efficiency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
V_OUT1
TO
TRACKSS2
PIN
R3 R1
TO
TO
V_FB1 V_FB2
PIN
PIN
R4 R2
V_OUT2
R3
R4
(5a) Coincident Tracking Setup
V_OUT1
TO
TRACKSS2
PIN
R1
TO
TO
V_FB1
V_FB2
PIN
PIN
R2
V_OUT2
R3
R4
3633 F05
(5b) Ratiometric Tracking Setup
Figure 5. Setup for Coincident and Ratiometric Tracking
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