LTC3637_15 Datasheet, PDF (17/26 Pages) Linear Technology – 76V, 1A Step-Down Regulator

LTC3637
APPLICATIONS INFORMATION
R_ISET. This will boost efficiency at mid-loads and reduce
the output voltage ripple dependency on load current at the
expense of slightly degraded load step transient response.
The peak inductor current is controlled by the voltage on
the I_SET pin. Current out of the I_SET pin is 5µA while the
LTC3637 is switching and is reduced to 1µA during sleep
mode. The I_SET current will return to 5µA on the first cycle
after sleep mode. Placing a parallel RC from the I_SET pin to
ground filters the I_SET voltage as the LTC3637 enters and
exits sleep mode which in turn will affect the output volt-
age ripple, efficiency and load step transient performance.
In general, when R_ISET is greater than 120k a C_ISET capacitor
in the 47pF to 100pF range will improve most performance
parameters. When R_ISET is less than 100k, the capacitance
on the I_SET pin should be minimized.
Efficiency Considerations
The efficiency of a switching regulator is equal to the output
power divided by the input power times 100%. It is often
useful to analyze individual losses to determine what is
limiting the efficiency and which change would produce
the most improvement. Efficiency can be expressed as:
Efficiency = 100% – (L1 + L2 + L3 + ...)
where L1, L2, etc. are the individual losses as a percent-
age of input power.
Although all dissipative elements in the circuit produce
losses, two main sources usually account for most of
the losses: V_IN operating current and I²R losses. The V_IN
operating current dominates the efficiency loss at very
low load currents whereas the I²R loss dominates the
efficiency loss at medium to high load currents.
1. The V_IN operating current comprises two components:
The DC supply current as given in the electrical charac-
teristics and the internal MOSFET gate charge currents.
The gate charge current results from switching the gate
capacitance of the internal power MOSFET switches.
Each time the gate is switched from high to low to
high again, a packet of charge, ∆Q, moves from V_IN to
ground. The resulting ∆Q/dt is the current out of V_IN
that is typically larger than the DC bias current.
2. I²R losses are calculated from the resistances of the
internal switches, R_SW and external inductor R_L. When
switching, the average output current flowing through
the inductor is “chopped” between the high side PMOS
switch and the external catch diode. Thus, the series
resistance looking back into the switch pin is a function
of the top and bottom switch R_DS(ON) values and the
duty cycle (DC = V_OUT/V_IN) as follows:
R_SW = (R_DS(ON)TOP)DC + (R_DS(ON)BOT) • (1 – DC)
The R_DS(ON) for both the top and bottom MOSFETs can
be obtained from the Typical Performance Characteris-
tics curves. Thus, to obtain the I²R losses, simply add
R_SW to R_L and multiply the result by the square of the
average output current:
I²R Loss = I_O2(R_SW + R_L)
Other losses, including C_IN and C_OUT ESR dissipative
losses and inductor core losses, generally account for
less than 2% of the total power loss.
Thermal Considerations
In most applications, the LTC3637 does not dissipate much
heat due to its high efficiency. But, in applications where
the LTC3637 is running at high ambient temperature with
low supply voltage and high duty cycles, such as dropout,
the heat dissipated may exceed the maximum junction
temperature of the part.
To prevent the LTC3637 from exceeding the maximum
junction temperature, the user will need to do some thermal
analysis. The goal of the thermal analysis is to determine
whether the power dissipated exceeds the maximum
junction temperature of the part. The temperature rise
from ambient to junction is given by:
T_R = P_D • θ_JA
where P_D is the power dissipated by the regulator and θ_JA
is the thermal resistance from the junction of the die to
the ambient temperature.
The junction temperature is given by:
T_J = T_A + T_R
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