LTC3622-2_15 Datasheet, PDF (17/24 Pages) Linear Technology – 17V, Dual 1A Synchronous Step-Down Regulator with Ultralow Quiescent Current

LTC3622/
LTC3622-2/LTC3622-23/5
Applications Information
Board Layout Considerations
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the LTC3622 (refer to Figure 3). Check the following in
the layout:
1. Do the capacitors C_IN connect to the V_IN and GND as
close as possible? These capacitors provide the AC
current to the internal power MOSFETs and their driv-
ers. Does C_VCC connect to INTV_CC as close as possible?
2. Are C_OUT and L closely connected? The (–) plate of
C_OUT returns current to GND and the (–) plate of C_IN.
3. The resistive divider, R1 and R2, must be connected
between the (+) plate of C_OUT and a ground line ter-
minated near GND. The feedback signal V_FB should be
routed away from noisy components and traces, such
as the SW line, and its trace should be minimized. Keep
R1 and R2 close to the IC.
4. Solder the exposed pad (Pin 15 for DFN, Pin 17 for
MSOP) on the bottom of the package to the GND plane.
Connect this GND plane to other layers with thermal
vias to help dissipate heat from the LTC3622.
5. Keep sensitive components away from the SW pin. The
input capacitor, C_IN, feedback resistors, and INTV_CC
bypass capacitors should be routed away from the SW
trace and the inductor.
6. A ground plane is highly recommended.
7. Flood all unused areas on all layers with copper, which
reduces the temperature rise of power components.
These copper areas should be connected to GND.
V_IN
GND
L1
C_IN
SW1
C_OUT1
VIAS TO
GROUND
PLANE
VIAS TO
GROUND
PLANE
C_IN
SW2
L2
V_IN
GND
C_OUT2
VIAS TO
GROUND
PLANE
Figure 3. Layout Diagram
36222 F03
For more information www.linear.com/LTC3622
3622fa
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